Nonvolatile Memory Partial Read Control via Bit Line Voltage Differentiation
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Solution Overview
Problem
Current nonvolatile memory devices face challenges in performing partial read operations without causing read disturbances due to differences in channel potentials between selected and unselected cell strings, leading to characteristic deterioration and increased Fowler-Nordheim stress.
Innovation Solution
The implementation of a nonvolatile memory device with a control logic circuit that applies distinct bit line voltages to selected and unselected cell strings, ensuring the dummy cells are turned off during read operations to maintain appropriate channel potentials and reduce stress between strings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a partial read operation is performed in a nonvolatile memory device, then read speed and efficiency are improved, but read disturbances occur due to channel potential differences between selected and unselected cell strings
Solution Approach 1:
The patent applies different voltage parameters to selected and unselected bit lines during partial read operations. Specifically, a first voltage level is applied to the selected bit line while a second voltage level (different from the first) is applied to unselected bit lines. This parameter differentiation maintains appropriate channel potentials in unselected cell strings, preventing read disturbances while enabling efficient partial read operations.
2Device complexity
If conventional read operations are performed without voltage differentiation, then device complexity is reduced, but characteristic deterioration occurs due to Fowler-Nordheim stress
Solution Approach 1:
The control logic circuit is configured to apply differentiated voltage parameters to bit lines based on selection status. During read operations, the circuit applies a first voltage to selected bit lines and a second voltage to unselected bit lines. This parameter control prevents excessive Fowler-Nordheim stress in unselected cell strings, reducing characteristic deterioration while maintaining manageable device complexity through integrated control logic.
Data Source
AI summary
A nonvolatile memory device includes a first cell string including a first dummy cell and connected to a selected string select line, a second cell string including a second dummy cell and connected to the selected string select line, a page buffer circuit configured to select one of the first and second cell strings to read data in a read operation, and a control logic circuit configured to apply a first bit line voltage to a bit line connected to the selected one of the first and second cell strings and a second bit line voltage to a bit line connected to an unselected one of the first and second cell strings in the read operation. The control logic circuit turns off the second dummy cell when the first cell string is selected and turns off the first dummy cell when the second cell string is selected.