Semiconductor Memory Device Pass Disturb Mitigation via Segmented Programming
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Solution Overview
Problem
Semiconductor memory devices face reliability issues due to the pass disturb phenomenon, where adjacent memory cells' threshold voltages change during programming, affecting data integrity and device reliability.
Innovation Solution
The semiconductor memory device employs a method where memory cells are grouped into permit and inhibit modes based on their program statuses, with program operations and verification performed in ascending order of program statuses, and mode changes made upon successful verification to prevent pass disturb.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If program operation is performed on memory cells, then data is written to memory cells, but pass disturb phenomenon causes threshold voltage changes in adjacent memory cells, reducing reliability
Solution Approach 1:
The patent segments the programming process into multiple stages (first program mode, second program mode, third program mode) with different voltage conditions. Each stage targets specific memory cell groups differently, allowing progressive programming while minimizing pass disturb effects on adjacent cells. The segmentation of programming modes enables controlled data writing without compromising reliability.
Solution Approach 2:
The patent applies different voltage conditions and programming modes to different groups of memory cells based on their target program statuses. Memory cells are divided into first, second, and third groups, each receiving customized programming treatment. This local differentiation allows efficient programming of target cells while protecting adjacent non-target cells from pass disturb effects.
2Productivity
If multiple program statuses are targeted simultaneously, then programming efficiency increases, but pass disturb effects become more severe, affecting threshold voltage stability
Solution Approach 1:
The patent segments memory cells into three distinct groups (first group, second group, third group) based on their target program statuses, and applies different programming modes to each group. This segmentation allows simultaneous programming of multiple status levels while controlling pass disturb effects through differentiated voltage application, thereby maintaining threshold voltage precision.
Solution Approach 2:
The patent dynamically switches between different programming modes (first, second, third program modes) based on the progression of programming verification. The system transitions from aggressive programming modes to more conservative modes as programming progresses, adapting the voltage conditions to minimize pass disturb while maintaining programming efficiency across multiple status levels.
Data Source
AI summary
An operating method of the semiconductor memory device including a plurality of memory cells each having one of “n” number of program statuses as a target program status. The operating method includes performing a program operation to the memory cells according to one of first to third program mode set until a first condition is met; performing the program operation to the memory cells according to another one of first to third program mode set until a second condition is met; and performing the program operation to the memory cells according to a remaining one of first to third program mode set.