Semiconductor Memory Global Word Line Path Circuit Segmentation
Solution Overview
Problem
Current semiconductor memory devices face challenges in reducing write and read speed while maintaining data persistence without external power, particularly in nonvolatile memory devices like flash memory, which affects their performance in portable electronic devices.
Innovation Solution
The semiconductor memory device incorporates a memory cell array with global word lines and path circuits that electrically connect to word lines, and page buffers with sub-page and main page buffers to optimize voltage application and data processing, reducing precharge time and improving operational efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nonvolatile memory device is used to maintain data without external power, then data persistence is improved, but write and read speed deteriorates
Solution Approach 1:
The memory device is divided into multiple memory blocks (first memory block and second memory block) with separate word lines and path circuits for each block. This segmentation allows parallel or independent operation of different memory blocks, enabling faster data access while maintaining nonvolatile storage capabilities in each block.
Solution Approach 2:
Path circuits are introduced as intermediary components between the control circuit and memory blocks. These path circuits include selection transistors that efficiently route control signals and data between different memory blocks and the control circuit, improving access speed without compromising data persistence.
2Productivity
If multiple global word lines are coupled to word lines in parallel, then operational efficiency is improved, but device complexity increases
Solution Approach 1:
The word lines are segmented into multiple groups, with each global word line controlling a specific memory block. This segmentation allows parallel operation of multiple memory blocks through their respective global word lines, improving operational efficiency while maintaining manageable complexity through organized structure.
Solution Approach 2:
The path circuits serve multiple functions: they select between different memory blocks, route control signals, and manage data flow. This multi-functionality reduces the need for separate dedicated circuits for each memory block, thereby improving operational efficiency without proportionally increasing device complexity.
Data Source
AI summary
A semiconductor memory device may include a memory cell array, two or more global word lines, and two or more path circuits. The two or more global word lines may be coupled to word lines in parallel. At least one of the two or more path circuits may be coupled between portions of each word line portions of each word line. Each path circuit may couple one of the global word lines to one of the word lines.