Memory System Path Selector for Channel Error Diagnosis

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Solution Overview

Problem

In memory systems with multi-channel configurations, determining the location of errors is challenging due to the complexity of channel paths and the inability to reproduce errors in real workload systems, leading to difficulties in identifying whether errors occur in the memory system or the channel paths.

Innovation Solution

A memory system with a path selector that changes connection states between channels and channel paths, allowing for error detection in both initial and altered connection states, enabling the differentiation between channel and channel path errors without requiring an independent error determining system.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If error detection is performed in a fixed connection state, then the detection process is simple, but the error location cannot be determined due to inability to reproduce errors

Engineering Contradiction:
Improveerror location determinationVSAvoidconnection state changing mechanism
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies the dynamics principle by making the connection state changeable rather than fixed. The path selector dynamically reconfigures the connection between channels and channel paths based on detected error locations, enabling adaptive error diagnosis. This allows the system to switch between different connection states (first connection state for normal operation, second connection state for error diagnosis) to reproduce and locate errors accurately.

Inventive Principle:
Principle #15Dynamics

2Reliability

If an independent error determining system is used, then error detection capability is enhanced, but the system complexity and cost increase

Engineering Contradiction:
Improveerror detection capabilityVSAvoidsystem structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies the universality principle by enabling the memory system to perform multiple functions: normal memory operation and self-diagnosis of errors. The path selector serves dual purposes by既可以 selecting channel paths during normal operation,又可以 reconfiguring connections for error diagnosis. This eliminates the need for a separate independent error determining system, reducing overall system complexity while maintaining error detection capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory system performs self-diagnosis by detecting errors in different connection states and determining error locations autonomously. The path selector automatically reconfigures connections based on detected errors, and the system itself identifies whether errors occur in channels or channel paths without external intervention. This self-service approach enhances reliability while avoiding the complexity of additional independent diagnostic systems.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If the connection state is changed for error diagnosis, then error location precision is improved, but the operation time increases

Engineering Contradiction:
Improveerror location precisionVSAvoiddiagnosis time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies the preliminary action principle by pre-configuring multiple connection states (first and second connection states) that can be quickly switched between. The path selector is designed to enable rapid reconfiguration of channel connections, so when an error is detected, the system can immediately switch to the appropriate connection state for diagnosis without significant time loss. This preliminary preparation of alternative connection states minimizes the time penalty for accurate error location.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10891204B2Memory system, a method of determining an error of the memory system and an electronic apparatus having the memory system
Publication Date: 2021.01.12 SAMSUNG ELECTRONICS CO LTD
  • US10891204B2 patent drawing
  • US10891204B2 patent drawing
  • US10891204B2 patent drawing

AI summary

A memory system including: a memory apparatus including a buffer die, core dies disposed on the buffer die, channels and a through silicon via configured to transmit a signal between the buffer die and at least one of the core dies; a memory controller configured to output a command signal and an address signal to the memory apparatus, to output a data signal to the memory apparatus and to receive the data signal from the memory apparatus; and an interposer including channel paths for connecting the memory controller and the channels, wherein the memory apparatus further includes a path selector for changing a connection state between the channels and channel paths, and when an error is detected in a first connection state between the channels and the channel paths, the path selector changes the first connection state to a second connection state.