Memory Circuit Phase Offset Adaptation for Write Data
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Solution Overview
Problem
Conventional memory circuits face limitations in adapting the phase relationship between clock and strobe signals due to inaccuracies in phase measurement and propagation time differences, leading to restricted operating frequencies and potential data acceptance errors.
Innovation Solution
A method that generates a write acceptance signal with a specific pulse duration to determine the number of strobe signal edges, compares this with a desired number, and provides error information to adjust the phase offset between clock and strobe signals, allowing for reliable data acceptance and operation within defined phase limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phase measurement is performed using conventional phase comparators in memory circuits, then the phase relationship between clock and strobe signals can be measured, but the measurement precision is insufficient due to production technology tolerances, limiting the maximum operating frequency
Solution Approach 1:
The patent introduces an intermediary calibration process that uses a known good phase relationship reference to establish accurate timing parameters. Instead of relying solely on imprecise phase comparators, the system uses calibration data stored in a lookup table that was pre-determined through accurate measurements, thereby achieving high precision without requiring complex real-time measurement hardware.
Solution Approach 2:
The patent performs phase relationship calibration in advance during manufacturing or initialization, storing the results in a lookup table. This preliminary action allows the system to operate at high frequencies without requiring complex real-time phase measurement hardware, as the calibration data is already available from prior accurate measurements.
2Reliability
If interconnect lengths are carefully adapted to achieve correct phase relationship, then data acceptance reliability is improved, but the adaptability to different bus configurations and frequency bands is reduced
Solution Approach 1:
The patent implements dynamic phase offset adjustment through a lookup table that can be selected based on different operating conditions such as bus configuration, frequency band, and signal propagation characteristics. This allows the system to adapt to various bus configurations (fly-by, point-to-point, daisy-chain) while maintaining reliable data acceptance, rather than being locked into fixed interconnect lengths.
Solution Approach 2:
The patent changes the phase offset parameter dynamically based on operating conditions by selecting appropriate entries from a lookup table. This allows the system to maintain correct phase relationships across different bus configurations and frequency bands without requiring physical reconfiguration of interconnect lengths, thereby improving both reliability and adaptability.
3Ease of operation
If phase offset is set using fixed predefined values in memory control unit, then the phase relationship can be maintained within certain limits, but the precision and accuracy of phase adaptation is insufficient for high-frequency operation
Solution Approach 1:
The patent implements a feedback mechanism where the system determines the actual number of strobe edges within the write acceptance signal window and compares it against expected values. This feedback is used to select the appropriate phase offset from a lookup table, ensuring high precision phase adaptation. The system continuously monitors and adjusts based on actual signal characteristics rather than relying solely on fixed predefined values.
Solution Approach 2:
The patent replaces coarse mechanical-style fixed phase offset adjustments with a fine-grained digital lookup table approach. Instead of using simple fixed delay circuits, the system uses a digitally stored table of precise phase offset values that can be selected based on measured conditions, achieving much higher precision suitable for high-frequency operation.
4Device complexity
If fly-by bus is used for clock and command/address transmission, then signal propagation is simplified, but non-defined phase offset occurs between clock and strobe signals due to different propagation speeds
Solution Approach 1:
The patent compensates for the non-defined phase offset in fly-by bus configurations by dynamically adjusting the phase offset parameter based on the number of strobe edges detected within the write acceptance signal window. The system selects appropriate phase offset values from a lookup table that accounts for the specific propagation characteristics of the fly-by bus, thereby defining the phase relationship even in this complex configuration.
Data Source
AI summary
A method is provided for adapting the phase relationship between a clock signal and a strobe signal for accepting write data to be transmitted into a memory circuit, a write command signal being transmitted to the memory circuit in a manner synchronized with the clock signal, a write data signal being transmitted synchronously with the strobe signal, a phase offset between the transmitted clock signal and the transmitted strobe signal being set such that the write data are reliably accepted in the memory circuit. The method comprises the following acts performed in the memory circuit: generating a write acceptance signal depending on the clock signal and the write command signal with a specific pulse duration; determining the number of edges of the strobe signal with a defined edge direction during the pulse duration; comparing the number determined with a predetermined desired number of corresponding edges of the strobe signal; and providing an item of error information indicating whether the number determined matches the desired number.