Memory Signal Timing Calibration with Operating-Mode Phase Control
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Solution Overview
Problem
Existing memory systems face write errors due to differential delay changes in data and data strobe signals caused by temperature or power-supply voltage variations, which are not adequately compensated for, leading to setup or hold time violations during write operations.
Innovation Solution
A phase control circuit, including a phase interpolator, adjusts the phase of data strobe signals in operating mode by generating an interpolated signal midway between two data strobe signals, using phase detection logic to advance or retard the signals based on edge samples, ensuring optimal phase alignment with data signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If phase adjustment of data strobe signals is performed using conventional methods, then write errors can be reduced, but continuous calibration during operating mode is not achievable
Solution Approach 1:
The patent implements dynamic phase adjustment by introducing a phase control circuit that can continuously modify the phase of data strobe signals during operating mode. The circuit uses phase interpolators to dynamically adjust phases based on real-time timing calibration, enabling the system to adapt to temperature and voltage variations without exiting operating mode.
Solution Approach 2:
The system performs self-calibration by using its own operating signals to generate calibration data. The phase control circuit automatically adjusts data strobe signal phases based on timing calibration performed during normal operation, eliminating the need for external calibration equipment or separate calibration modes.
2Measurement precision
If real-time phase adjustments are implemented, then timing calibration accuracy is improved, but device complexity increases
Solution Approach 1:
The phase control circuit is designed to perform multiple functions: it generates interpolated data strobe signals, performs timing calibration during operating mode, and adjusts phases in real-time. This multi-functionality reduces the need for separate dedicated calibration circuits, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent introduces phase interpolators as intermediary components that generate intermediate phase signals between existing data strobe signals. These interpolators serve as mediators between the raw signals and the final calibrated signals, enabling precise phase adjustment without requiring complex direct control mechanisms.
3Adaptability or versatility
If operating-mode calibration is performed, then system performance is maintained under varying conditions, but additional circuit components are required
Solution Approach 1:
The patent merges the calibration function with the normal operating circuitry. The phase control circuit is integrated into the existing data strobe signal generation path, combining calibration operations with regular signal generation. This merging approach enables adaptability to environmental variations while minimizing the addition of separate calibration-specific components.
Data Source
AI summary
A system and method for memory signal timing calibration. In some embodiments, the system includes: a memory input-output circuit, including: a first circuit for generating a first data signal; a second circuit for generating a second data signal; and a first phase control circuit, the first phase control circuit being configured to perform a phase adjustment of a phase of the second data signal.