Memory Pillar Insulator Profile for Charge Breakthrough Suppression
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in maintaining data retention due to charge breakthrough issues, where electric charge leaks from thicker charge storage layers to adjacent layers with similar thickness, leading to data deterioration and reduced storage capacity.
Innovation Solution
The semiconductor memory device employs a memory pillar structure with varying diameters and insulating film thicknesses, where the insulating film is thicker in cell regions and thinner at guard regions, preventing charge breakthrough and allowing for thinner interconnect structures by maintaining adequate distance between memory cell transistors without increasing interlayer thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the charge storage layer is made thicker to increase storage capacity, then the storage capacity is improved, but charge breakthrough occurs to adjacent layers causing data deterioration
Solution Approach 1:
The insulating film thickness is varied locally: thicker in cell regions (where charge storage is needed) and thinner in guard regions (where charge isolation is prioritized). This local differentiation allows the charge storage layer to be effectively thicker for capacity while preventing charge breakthrough through strategic thinning at isolation points.
Solution Approach 2:
The memory pillar cross-section is segmented into distinct cell regions and guard regions. The insulating film is selectively positioned in guard regions to segment and isolate charge storage areas, preventing charge leakage while maintaining storage capacity in cell regions.
2Reliability
If the distance between memory cell transistors is increased to prevent charge leakage, then data retention is improved, but the interconnect structure becomes thicker
Solution Approach 1:
The insulating film is selectively applied only in guard regions rather than uniformly across the entire structure. This local quality approach provides charge isolation where needed while maintaining thinner overall interconnect thickness by eliminating unnecessary insulating material in cell regions.
Solution Approach 2:
Instead of increasing vertical thickness to prevent charge leakage, the solution introduces horizontal segmentation through guard regions with insulating films. This dimensional shift allows charge isolation through lateral separation rather than vertical thickening.
Data Source
AI summary
A semiconductor memory device includes a substrate, a layer stack, and a pillar. The layer stack is in a first direction above the substrate. The pillar penetrates the layer stack in the first direction. The layer stack includes a first conductor and a first insulator on an upper surface of the first conductor along the first direction. The pillar includes a second insulator extending along an extending direction of the pillar. The second insulator includes a first part located in a first layer in which the first conductor is located and a second part located in a second layer in which the first insulator is located. The first part includes a portion thicker than the second part. A diameter of the pillar in the first layer is larger than a diameter of the pillar in the second layer.