3D Memory Support Pillar Electrical Isolation
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in electrically isolating support pillar structures from substrates, which affects the performance and reliability of memory devices.
Innovation Solution
A three-dimensional memory device structure is developed, featuring a support pillar structure within a memory opening that includes a vertical semiconductor layer isolated from the substrate by a dielectric material portion, allowing for effective electrical isolation and improved device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If support pillar structures are directly connected to the substrate, then manufacturing is simpler, but electrical isolation is poor leading to interference
Solution Approach 1:
The support pillar structure is segmented into two parts: a lower support portion extending from the substrate and an upper support portion extending from the memory stack. These portions are electrically isolated from each other, allowing the support function to be maintained while achieving electrical isolation to prevent interference.
Solution Approach 2:
A gap or dielectric material acts as an intermediary between the lower and upper support portions of the support pillar structure. This intermediary element provides the necessary electrical isolation while still allowing the support pillar to fulfill its mechanical support function.
2Reliability
If dielectric material is added to isolate support pillars, then electrical isolation improves, but manufacturing complexity increases
Solution Approach 1:
The dielectric material is deposited as part of the memory stack formation process before the support pillar structure is fully formed. This preliminary action allows the dielectric layer to be in place before the support portions are created, simplifying the overall manufacturing sequence.
Solution Approach 2:
The formation of the dielectric material for electrical isolation is merged with the existing memory stack formation process. The same dielectric layers used in the memory stack are also used to provide electrical isolation for the support pillar structure, reducing the need for additional manufacturing steps.
Data Source
AI summary
A first tier structure including a first alternating stack of first insulating layers and first sacrificial material layers is formed over a substrate. First support openings and first memory openings are formed through the first tier structure. A dielectric material portion providing electrical isolation from the substrate is formed in each first memory openings. A second tier structure including a second alternating stack of second insulating layers and second sacrificial material layers is formed the first tier structure. Second support openings and second memory openings are formed through the second tier structure above the first support openings and the first memory openings. Memory stack structures are formed in inter-tier openings formed by adjoining the first and second memory openings. The dielectric material portions provide electrical isolation between the substrate and the vertical semiconductor layers formed within support pillar structures to prevent or reduce electrical shorts to the substrate through the support pillar structures.