Cross-Point Memory Pillar Etching via Sacrificial Interlayer Film
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Solution Overview
Problem
In the manufacturing of cross-point type semiconductor memory devices, achieving a selection ratio of 1:1 between the material for the memory cell layer and the SiO2 interlayer insulator film is difficult, leading to residual interlayer insulator film acting as a mask and potentially causing shorts between adjacent memory cells.
Innovation Solution
The method involves forming first and second trenches in alternating directions to create memory cells in the shape of pillars, with the removal of the interlayer film isotropically from the second trenches to prevent residue and ensure proper separation, and using a sacrifice layer to enhance etching precision and prevent interference between memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If etching is performed to form second trenches through the interlayer insulator film and memory cell layer, then memory cells are separated and formed, but residual interlayer insulator film remains on the side walls acting as a mask and causing shorts between adjacent memory cells
Solution Approach 1:
The patent applies a preliminary action by forming a sacrificial layer (first interlayer film) before the main etching process. This sacrificial layer is selectively removed after trench formation, allowing complete clearance of the interlayer insulator film from trench bottoms and side walls. The sacrificial layer acts as a temporary protective element that enables precise control of the etching depth and prevents residue formation that would cause shorts between memory cells.
Solution Approach 2:
The patent uses an intermediary approach by introducing a sacrificial layer (first interlayer film made of organic material) between the SiO2 interlayer insulator film and the memory cell layer. This intermediary layer facilitates selective removal processes: it protects the underlying structures during initial etching, then is selectively removed afterward to ensure complete clearance of the interlayer insulator film without damaging adjacent memory cell materials.
2Manufacturing precision
If a high selection ratio between memory cell layer material and SiO2 interlayer insulator film is pursued, then precise etching control is achieved, but manufacturing complexity increases due to difficulty in achieving perfect selection ratio
Solution Approach 1:
The patent introduces a sacrificial layer (first interlayer film) as an intermediary element that simplifies the etching process. Instead of requiring a perfect selection ratio between the etchant and both the interlayer insulator film and memory cell layer materials, the sacrificial layer provides a intermediate step that enables selective removal. The etchant can be optimized to selectively remove the sacrificial layer first, then subsequently remove the interlayer insulator film, reducing the complexity of achieving precise selection ratios across multiple material interfaces.
Solution Approach 2:
The sacrificial layer functions as a disposable element that is intentionally designed to be removed after serving its protective and guiding function during the etching process. This temporary structure simplifies the overall manufacturing process by providing easy-to-control selective removal characteristics, eliminating the need for complex process parameters to achieve perfect selection ratios between permanent structural materials.
3Reliability
If the interlayer insulator film is completely removed from trench bottoms and side walls, then shorts between memory cells are prevented, but additional process steps are required increasing manufacturing complexity
Solution Approach 1:
The patent applies preliminary action by forming the sacrificial layer before the main etching process to enable complete removal of the interlayer insulator film. The sacrificial layer is positioned to extend beyond the trench regions, allowing subsequent selective removal that ensures complete clearance of the interlayer insulator film from trench bottoms and side walls. This preliminary structure enables a single etching process to achieve complete removal rather than requiring multiple sequential removal steps.
Solution Approach 2:
The patent merges multiple functions into the sacrificial layer: it serves as an etching stop layer, a protective mask during trench formation, and a guide for complete interlayer insulator film removal. By combining these functions into a single sacrificial layer structure, the patent reduces the number of separate process steps needed to achieve complete removal of the interlayer insulator film, thereby preventing shorts while minimizing the increase in manufacturing complexity.
Data Source
AI summary
A method of manufacturing semiconductor memory device comprises forming a first wiring layer and a memory cell layer above a semiconductor substrate; forming a plurality of first trenches extending in a first direction in the first wiring layer and the memory cell layer, thereby forming first wirings and separating the memory cell layer; burying a first interlayer film in the first trenches to form a stacked body; forming a second wiring layer above the stacked body; forming a plurality of second trenches, extending in a second direction intersecting the first direction and reaching an upper surface of the first interlayer film in depth, in the first stacked body with the second wiring layer formed thereabove, thereby forming second wirings; removing the first interlayer film isotropically; and digging the second trenches down to an upper surface of the first wirings, thereby forming memory cells.