Memory Pin Termination Switching for Mixed-Amplitude Signals
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently managing signal termination and amplitude in NAND flash memory systems, leading to potential signal integrity issues and reduced performance.
Innovation Solution
The semiconductor memory device incorporates a first pin that receives both a primary signal and a secondary signal with a smaller amplitude, along with a receiving circuit that compares these signals to output corresponding signals, and a terminating circuit that is enabled or disabled based on the received signal type to manage voltage amplitudes effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a terminating circuit is always enabled to ensure signal integrity, then signal quality is improved, but power consumption increases and the device cannot handle multiple signal types efficiently
Solution Approach 1:
The terminating circuit is designed to dynamically change its state based on the received signal type. When a differential signal is detected, the terminating circuit is enabled to maintain signal integrity. When a single-ended signal is detected, the terminating circuit is disabled to reduce power consumption. This dynamic adaptation resolves the contradiction between maintaining signal quality and reducing power usage.
Solution Approach 2:
The termination resistance value is changed based on the signal type. For differential signals, a specific termination resistance is applied to match the differential impedance. For single-ended signals, the termination resistance is adjusted or disabled. This parameter change allows the device to optimize both signal integrity and power consumption depending on the operating mode.
2Device complexity
If the receiving circuit is designed to handle only high-amplitude signals, then simple circuit design is achieved, but the device cannot process low-amplitude signals effectively
Solution Approach 1:
The receiving circuit is designed with multi-functionality to handle both differential and single-ended signals. By incorporating a signal type detection mechanism and a configurable terminating circuit, the same receiving circuit can process both high-amplitude differential signals and low-amplitude single-ended signals effectively. This universal design resolves the contradiction between circuit simplicity and signal type compatibility.
3Reliability
If signal termination is always applied to all pins, then signal reflections are minimized, but the device cannot achieve low-power mode operation
Solution Approach 1:
The terminating circuit incorporates a control mechanism that dynamically enables or disables termination based on the detected signal type. In differential mode, termination is enabled to minimize reflections and maintain signal quality. In single-ended mode, termination is disabled to achieve low-power operation. This dynamic control resolves the contradiction between signal quality and power efficiency.
Data Source
AI summary
According to an embodiment, a semiconductor memory device includes a first pin, a first receiving circuit, and a first terminating circuit. The first pin receives a first signal and a second signal having a smaller amplitude than the first signal. The first receiving circuit is connected to the first pin and outputs, based on a comparison between the first signal and a first voltage, a third signal. The first receiving circuit also outputs, based on a comparison between the second signal and a second voltage, a fourth signal having a smaller amplitude than the third signal. The first terminating circuit is connected to the first pin. The first terminating circuit is disabled if the first pin receives the first signal, and enabled if the first pin receives the second signal.