Nonvolatile Memory Address Input Plane Column Merging
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Solution Overview
Problem
The existing methods for inputting addresses in nonvolatile memory devices with multiple planes are complex and inefficient, requiring multiple address cycles and unnecessary address inputs, particularly when performing operations across multiple planes.
Innovation Solution
A method that simplifies address input by incorporating plane address information into column addresses, allowing for reduced address cycles and streamlined operations by separating row and column addresses, with the plane address included within the column address bits, enabling efficient data input/output and operation across multiple planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate plane address input is used for each plane operation, then plane selection accuracy is improved, but address input complexity and time increase
Solution Approach 1:
The patent merges the plane address input with the column address input by incorporating plane address information into the column address bits. This allows the memory device to select planes during the column address input phase rather than requiring a separate plane address input phase, thereby reducing address input complexity while maintaining accurate plane selection.
Solution Approach 2:
The column address input is made multi-functional by enabling it to serve both column selection and plane selection purposes. By incorporating plane address information into the column address bits, the same input phase performs dual functions, eliminating the need for separate plane address input and simplifying the overall address input process.
2Reliability
If multiple address cycles are used for plane and column address input, then address input completeness is improved, but operation time increases
Solution Approach 1:
The patent combines plane address input and column address input into a single address input phase. By incorporating plane address information into the column address bits, the memory device completes both plane selection and column selection within the same time cycle, eliminating the need for multiple sequential address cycles and thereby reducing operation time while maintaining address input completeness.
3Measurement precision
If separate plane address input is required for data read operations, then data read accuracy is improved, but data input/output efficiency decreases
Solution Approach 1:
The patent merges plane selection and column address selection into a single input phase for data read operations. By incorporating plane address information into the column address bits, the memory device can accurately identify both the plane and column simultaneously, ensuring data read accuracy while improving data input/output efficiency by reducing the number of sequential operations required.
Data Source
AI summary
A method of inputting address in a nonvolatile memory device includes inputting a row address including an information for selecting a memory block and an information for selecting a page, and inputting a column including an information for selecting a column and an information for selecting a plane.