Nonvolatile Memory Plane Control for Read Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Nonvolatile memory devices with a multi-plane structure face challenges in performing read operations simultaneously due to differences in program states between planes, particularly when using Multi-Level Cell (MLC) programming methods, leading to inefficiencies and the need for different read algorithms for each plane.
Innovation Solution
The implementation of a control system that generates plane select and hold signals to enable or disable planes based on program states, using reference voltages to determine the program state of each plane and adjust read operations accordingly, allowing for optimized read operations on each plane independently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If read operations are performed on multiple planes simultaneously using the same voltage, then read speed is improved, but read accuracy deteriorates due to different program states between planes
Solution Approach 1:
The patent applies local quality by configuring different read reference voltages for different planes based on their program states. Specifically, planes that have undergone MSB programming use a first read reference voltage, while planes that have undergone LSB programming use a second read reference voltage. This localized differentiation of read parameters ensures accurate data retrieval from each plane without being affected by the program state differences of other planes, thereby resolving the contradiction between simultaneous read speed and read accuracy.
2Measurement precision
If different read algorithms are applied to each plane based on program state, then read accuracy is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by determining the program state of each plane (MSB or LSB) before performing read operations. The controller pre-configures the appropriate read reference voltage for each plane based on its program state, and this configuration is maintained throughout the read operation. This advance preparation eliminates the need for complex dynamic adjustments during reading, simplifying the control logic while ensuring accurate reads from planes with different program states.
3Productivity
If all planes are enabled for read operation, then productivity is improved, but energy consumption increases due to unnecessary operations
Solution Approach 1:
The patent applies partial action by enabling only the necessary number of planes for read operations based on the actual data access requirements. Instead of uniformly enabling all planes, the controller selectively activates planes that require reading, determined by their program states and the read command parameters. This selective activation reduces the number of simultaneously operating planes, thereby lowering energy consumption while maintaining the required read throughput for the actual data being accessed.
Data Source
AI summary
A nonvolatile memory device includes a first plane and a second plane, an address decoder configured to decode an externally input address and to output a first plane select signal and a second plane select signal for enabling any one of the first and second planes, a controller configured to output a first plane hold signal and a second plane hold signal for disabling any one of the first and second planes depending on program states of the first plane and the second plane, a first plane control unit configured to enable the first plane in response to a first plane select signal and the first plane hold signal, and a second plane control unit configured to enable the second plane in response to a second plane select signal and the second plane hold signal.


