Nonvolatile Memory Plane Ready Busy Signal Command Prioritization

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Solution Overview

Problem

Current nonvolatile memory devices face inefficiencies in managing operations across multiple planes, leading to suboptimal performance due to lack of effective command prioritization and status monitoring, which affects overall operating speed and resource allocation.

Innovation Solution

A nonvolatile memory device architecture with separate planes that utilize a common data bus for command execution and provide a ready/busy signal to indicate idle or busy states, allowing for independent operation and priority-based suspend/resume functionality to optimize resource allocation and improve operating speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple planes are used to increase storage capacity and parallel operation capability, then productivity is improved, but device complexity increases due to need for command prioritization and status monitoring mechanisms

Engineering Contradiction:
Improveoperating speedVSAvoidcommand management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple planes (first plane, second plane, etc.), each with its own memory cell array that can operate independently. This segmentation enables parallel data read/write operations across different planes, thereby improving overall productivity and operating speed while maintaining manageable complexity through modular architecture

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A ready/busy signal mechanism is implemented to provide feedback on the operational status of each plane. The signal indicates whether a plane is ready to accept commands or is currently busy executing operations. This feedback mechanism enables the controller to prioritize commands effectively and manage complexity by automatically coordinating plane utilization without requiring complex manual intervention

Inventive Principle:
Principle #23Feedback

2Productivity

If independent plane operations are enabled to improve parallel processing capability, then productivity is improved, but ease of operation deteriorates due to need for priority-based command management

Engineering Contradiction:
Improveparallel operation capabilityVSAvoidcommand execution simplicity
Core Design Contradiction:
ProductivityVSEase of operation

Solution Approach 1:

The ready/busy signal provides automatic feedback on plane availability, simplifying command execution by allowing the controller to simply check the signal state rather than manually managing complex scheduling. This feedback mechanism maintains ease of operation while enabling parallel processing across multiple planes

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The command execution system dynamically adjusts based on plane status through the ready/busy signal. When a plane is busy, the system can suspend or prioritize other commands, creating a dynamic command management approach that maintains simplicity while achieving parallel operation benefits

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9093132B2Nonvolatile memory device, memory system and controller operating method
Publication Date: 2015.07.28 SAMSUNG ELECTRONICS CO LTD
  • US9093132B2 patent drawing
  • US9093132B2 patent drawing
  • US9093132B2 patent drawing

AI summary

An operating method for a memory system provides a ready/busy signal from a nonvolatile memory device indicating an idle state or a busy state to a controller. The controller generates a next command but transfers the next command to the nonvolatile memory device in response to the ready/busy signal and the idle verse busy state of a target plane among multiple planes of the nonvolatile memory device.