3D Memory Plug Separation Structure for Dense Reliable Arrays
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Solution Overview
Problem
Current memory devices face challenges in increasing integration density and simplifying manufacturing processes to store large-capacity data while maintaining reliability.
Innovation Solution
A stacked structure with vertically oriented gate lines, separated by plug separation patterns and air gaps, and surrounded by separation layers to enhance the reliability and efficiency of memory devices, including the formation of main plugs, slit holes, and separation holes to separate memory cells effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If integration density is increased to store large-capacity data, then storage capacity is improved, but manufacturing process complexity increases
Solution Approach 1:
The memory device is divided into multiple memory blocks separated by isolation structures. Each memory block contains separate first and second memory cell arrays with distinct word lines and bit lines. This segmentation allows independent manufacturing and testing of blocks, reducing overall process complexity while increasing total storage capacity through parallel expansion.
Solution Approach 2:
The patent transitions from planar memory architecture to three-dimensional stacked architecture. Memory blocks are arranged vertically with multiple layers of memory cell arrays stacked above each other. Word lines and bit lines are extended in the vertical direction, enabling significantly higher storage density without proportionally increasing manufacturing process complexity.
2Quantity of substance
If more memory cells are integrated, then storage capacity increases, but manufacturing precision requirements worsen
Solution Approach 1:
The memory device is divided into multiple memory blocks separated by isolation structures. Each memory block contains separate first and second memory cell arrays with distinct word lines and bit lines. This segmentation allows independent manufacturing and testing of blocks, reducing overall process complexity while increasing total storage capacity through parallel expansion.
Solution Approach 2:
The patent transitions from planar memory architecture to three-dimensional stacked architecture. Memory blocks are arranged vertically with multiple layers of memory cell arrays stacked above each other. Word lines and bit lines are extended in the vertical direction, enabling significantly higher storage density without proportionally increasing manufacturing process complexity.
Data Source
AI summary
The present disclosure relates to a memory device and a manufacturing method of the memory device. The memory device according to an embodiment includes a stacked structure including gate lines separated from and stacked on top of each other, a main plug formed in a vertical direction to the stacked structure, a plug separation pattern separating the main plug into first and second sub-plugs, a gap formed in the plug separation pattern; and a separation layer surrounding the gap.


