Memory Power Collapse via Segmented Region Partitioning

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Solution Overview

Problem

Existing methods for power management in microcontrollers and SoCs fail to efficiently power down unused memory without detrimental effects, leading to increased power consumption due to transistor leakage and retention current.

Innovation Solution

A power management system that partitions memory into non-collapsible and collapsible regions, with a memory management unit allocating and powering down the collapsible region upon receiving a power down command, while maintaining power to the non-collapsible region and polling associated thread tasks to determine if the collapsible region should be powered down or maintained.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If memory is powered down to reduce power consumption, then energy efficiency is improved, but system reliability deteriorates due to potential data loss and software state corruption

Engineering Contradiction:

Improvepower consumptionVSAvoidsoftware state integrity

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The memory system is divided into collapsible and non-collapsible regions. The non-collapsible region maintains power to preserve critical software state information, while the collapsible region can be powered down to save energy. This segmentation allows selective power management that reduces overall power consumption while maintaining system reliability through preservation of essential data in the non-collapsible region.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by saving critical software state information to the non-collapsible memory region before powering down the collapsible region. The memory management unit coordinates this preliminary data preservation, ensuring that essential information is secured in the powered-on non-collapsible region before the power collapse occurs, thereby preventing data loss and maintaining reliability.

Inventive Principle:

Principle #10Preliminary action

2Adaptability or versatility

If memory is partitioned into non-collapsible and collapsible regions, then power management flexibility is improved, but device complexity increases due to additional memory management requirements

Engineering Contradiction:

Improvepower management flexibilityVSAvoidmemory management complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory management unit is designed to handle multiple functions: it manages both collapsible and non-collapsible memory regions, allocates memory to thread tasks, and coordinates power collapse operations. This multi-functional design consolidates complexity into a single management unit that can handle diverse memory management tasks, reducing the need for separate specialized components and simplifying the overall system architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory management unit autonomously monitors software state and automatically coordinates power collapse operations without requiring external intervention. It self-manages the allocation of memory regions to thread tasks and determines when power collapse is safe to execute, reducing the burden on external control systems and simplifying the overall control architecture despite the increased memory management capabilities.

Inventive Principle:

Principle #25Self-service

3Reliability

If power is maintained to non-collapsible memory region, then data integrity is improved, but power consumption increases compared to complete power down

Engineering Contradiction:

Improvedata integrityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

Power is applied selectively to different memory regions based on their specific requirements. The non-collapsible region maintains power to preserve critical data integrity, while the collapsible region is powered down to reduce consumption. This local differentiation of power supply quality and availability optimizes the balance between data integrity and power consumption by applying power only where absolutely necessary.

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS10303235B2Systems and methods for implementing power collapse in a memory

Publication Date: 2019.05.28 QUALCOMM INC

AI summary

A power management system for stack memory thread tasks according to some examples of the disclosure may include a non-collapsible memory region, a collapsible memory region configured below the non-collapsible memory region, a memory management unit in communication with the non-collapsible memory region and the collapsible memory region, the memory management unit operable to allocate a portion of the non-collapsible memory region and a portion of the collapsible memory region to a thread task upon initialization of the thread task and power down the portion of the collapsible memory region allocated to the thread task upon receiving a power down command.