Multi-chip Memory Power Supply Control via Drive Signal Segmentation
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Solution Overview
Problem
Conventional multi-chip semiconductor memory devices experience unnecessary power consumption due to active internal power supply voltage generation circuits being enabled for all memory chips, even when only one is in an active interval, leading to inefficiency.
Innovation Solution
Each memory chip in the multi-chip semiconductor memory device includes an active internal power supply generation circuit that converts external power supply voltage into internal power supply voltage and can be disabled via a drive control signal, with a conversion control circuit generating this signal to deactivate it when any chip is not in an active interval, ensuring only active chips' power supply circuits are enabled.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all active internal power supply voltage generation circuits are enabled when chip enable signal is active, then all memory chips can respond to external commands, but unnecessary power is consumed by inactive memory chips
Solution Approach 1:
The patent segments the power supply control by introducing individual drive control signals for each memory chip, separating the chip enable function from the power supply enable function. This allows independent control of power supply circuits for each chip, enabling only active chips to consume power while maintaining the ability of all chips to respond when needed.
Solution Approach 2:
The patent implements dynamic power supply control where the drive control signal changes state based on whether a memory chip is in an active interval or not. The power supply circuit transitions between enabled and disabled states dynamically, optimizing power consumption based on actual operational needs rather than maintaining a static enabled state.
2Use of energy by moving object
If individual drive control signals are introduced to control power supply circuits, then power consumption is reduced, but device complexity increases
Solution Approach 1:
The drive control signal generation circuit performs multiple functions: it determines whether a memory chip is in an active interval, generates the drive control signal based on this determination, and controls the power supply circuit. By combining these functions into a single circuit, the patent avoids the need for separate control mechanisms, thereby limiting the increase in device complexity while achieving individual chip power control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces power consumption by disabling inactive memory chips' active internal power supply voltage generation circuits during non-active intervals, resulting in lower overall power usage compared to conventional devices where all active circuits are enabled.
Implementation Method 1
an active internal power supply generation circuit configured to convert an external power supply voltage into an internal power supply voltage
Data Source
AI summary
A multi-chip semiconductor memory device includes of a plurality of memory chips sharing a predetermined chip enable signal. Each of the plurality of memory chips includes an active internal power supply generation circuit configured to convert an external power supply voltage into an internal power supply voltage and to be disabled in response to deactivation of a predetermined drive control signal. Each of the plurality of memory chips also includes a conversion control circuit for generating the drive control signal, wherein the drive control signal is deactivated in an interval in which any of the plurality of memory chips is in an active interval.