Volatile Memory Power Pulsing for Retention and Fast Data Erasure

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Solution Overview

Problem

Volatile memory circuits require continuous power supply, leading to high energy costs and data loss issues due to the remanence time after power cutoff.

Innovation Solution

Implementing a power circuit that provides periodic power pulses to volatile memory, with pulse duration adjusted based on the memory's remanence time, and a signal to interrupt power in case of processor malfunction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If continuous power supply is provided to volatile memory, then data retention is ensured, but energy consumption increases

Engineering Contradiction:

Improvedata retentionVSAvoidenergy consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic power pulsing to volatile memory instead of continuous power supply. The power circuit receives a periodic control signal that generates power pulses with a period equal to or less than the remanence time of the volatile memory, allowing data to be retained during the remanence period without continuous energy input.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent utilizes the remanence property of volatile memory as a preliminary mechanism that naturally retains data for a specific duration after power cutoff. By designing power pulses that expire before or at the remanence time, the system leverages this inherent property to maintain data without continuous power.

Inventive Principle:

Principle #10Preliminary action

2Use of energy by moving object

If power supply is interrupted to volatile memory, then energy consumption decreases, but data loss occurs

Engineering Contradiction:

Improveenergy consumptionVSAvoiddata loss

Core Design Contradiction:

Use of energy by moving objectVSLoss of information

Solution Approach 1:

The power circuit generates periodic power pulses that are synchronized with the remanence time of the volatile memory. The pulse period is set to be equal to or less than the remanence time, ensuring that data is refreshed before complete loss occurs while still allowing power interruption periods that save energy.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent changes the power supply parameter from continuous to periodic pulsing. By adjusting the pulse width and period to match the remanence characteristics of the specific volatile memory device, the system optimizes between data retention and energy consumption.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If power pulses are used for volatile memory, then energy consumption is reduced, but data retention time is limited

Engineering Contradiction:

Improveenergy consumptionVSAvoiddata retention time

Core Design Contradiction:

Use of energy by moving objectVSDuration of action of stationary object

Solution Approach 1:

The system uses periodic power pulsing where the pulse period is carefully selected to match or be less than the remanence time of the volatile memory. This ensures data is refreshed periodically without requiring continuous power, extending effective data retention while reducing energy consumption during non-active periods.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS11605404B2Power circuit that interrupts supply of power to a volatile memory in response to a signal indicating a malfunction of a processor

Publication Date: 2023.03.14 STMICROELECTRONICS BELGIUM

AI summary

The present description relates to a method and a circuit for powering a volatile memory in which power pulses are sent to the memory, the duration between two pulses being shorter than a remanence time of said volatile memory.