Memory Pre-Charging Circuit Dynamic Power Disconnection
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Solution Overview
Problem
Traditional memory circuits waste active current during row active states when no reading-writing operations are performed, as they maintain a pre-charged voltage on data lines without subsequent operations, leading to inefficiency.
Innovation Solution
A memory circuit with a pre-charging circuit and control circuit that dynamically connects and disconnects power supply terminals based on the memory's active state and operation status, preventing pre-charging when no reading-writing operations are performed to conserve current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a preset voltage is input into the data line in the memory array each time the memory enters a row active state, then the data line is pre-charged for subsequent reading-writing operations, but the active current IDD0 is increased and current is wasted when no subsequent reading-writing operation is performed
Solution Approach 1:
The patent applies dynamics by making the pre-charging operation conditional rather than static. The control circuit dynamically adjusts whether to perform pre-charging based on the actual operation status. When a reading-writing operation is detected, pre-charging is enabled; when no operation is performed, pre-charging is disabled. This dynamic adaptation resolves the contradiction between maintaining reliable pre-charging and avoiding unnecessary current waste.
Solution Approach 2:
The patent changes the operational parameter of pre-charging from a fixed state (always on during row active) to a variable state (conditionally on). By monitoring the operation status and adjusting the pre-charging parameter accordingly, the system achieves both reliable data line preparation when needed and current conservation when not needed, resolving the contradiction between reliability and energy loss.
2Ease of operation
If pre-charging is performed during row active state, then data line is prepared for reading-writing operations, but current waste occurs when no operations are performed
Solution Approach 1:
The patent implements feedback by using the operation status signal to control the pre-charging operation. The control circuit receives feedback about whether a reading-writing operation will be performed and adjusts the pre-charging accordingly. This feedback mechanism ensures that pre-charging is only performed when it will be useful, eliminating unnecessary current consumption while maintaining operation readiness when needed.
Solution Approach 2:
The patent applies preliminary action conditionally - pre-charging is performed in advance of the actual reading-writing operation only when such operation is detected. This conditional preliminary action ensures data line readiness when operations occur, while avoiding unnecessary preliminary actions (and associated current waste) when no operations are performed, thus resolving the contradiction between operation readiness and energy conservation.
Data Source
AI summary
A memory circuit includes a pre-charging circuit and a control circuit. The pre-charging circuit includes a first pre-charging unit, a second pre-charging unit, a first power supply terminal, a second power supply terminal, a first control terminal, a second control terminal and a data terminal; the first pre-charging unit is connected with the first power supply terminal, the first control terminal and the data terminal; the second pre-charging unit is connected with the second power supply terminal, the second control terminal and the data terminal. The control circuit is configured to in response to a memory being in a row active state and not performing a reading-writing operation, control, through the second pre-charging unit, the data terminal and the second power supply terminal to be disconnected, and control, through the first pre-charging unit, the data terminal and the first power supply terminal to be disconnected.