Nonvolatile Memory Page Buffer Precharge Voltage Control
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Solution Overview
Problem
In three-dimensional semiconductor memory devices, read operations face errors due to varying distances between cell strings and doping regions, leading to inconsistent bit line voltages and cell currents, which affect data discrimination accuracy.
Innovation Solution
The nonvolatile memory device employs a method where precharge voltages are set and provided to bit lines based on the distance between cell strings and doping regions, optimizing voltage levels to ensure consistent cell current discharge and improve read margin by controlling the threshold voltages of page buffers connected to bit lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single precharge voltage level is used for all bit lines, then the device structure and control logic are simple, but read errors occur due to varying distances between cell strings and doping regions
Solution Approach 1:
The patent applies local quality by providing different precharge voltage levels to different bit line groups based on their specific characteristics. Bit lines are divided into first and second groups, with the first group receiving a first precharge voltage level and the second group receiving a second precharge voltage level. This localized differentiation compensates for the varying distances between cell strings and doping regions, improving read accuracy without requiring complete system complexity.
Solution Approach 2:
The patent segments the bit lines into multiple groups based on their distance characteristics from doping regions. By dividing the bit lines into distinct groups (first bit line group and second bit line group) and applying different precharge voltage levels to each group, the system addresses the reliability issue caused by distance variations while maintaining manageable control complexity through organized segmentation.
2Measurement precision
If multiple precharge voltage levels are provided to different bit lines, then data discrimination accuracy is improved, but the control logic and voltage management become more complex
Solution Approach 1:
The page buffers are configured with different precharge voltage levels according to the specific characteristics of the bit lines they serve. This local quality approach ensures that each bit line group receives the appropriate voltage level for optimal data discrimination, while the complexity is contained within the page buffer configuration rather than affecting the entire device architecture.
Data Source
AI summary
A nonvolatile memory device includes a substrate, multiple doping regions, multiple cell strings and multiple page buffers. The doping regions extend in a first direction along the substrate and are spaced apart from one another in a second direction. The cell strings are provided according to a specific pattern between adjacent first and second doping regions among the multiple regions, each of the cell strings including multiple cell transistors stacked in a third direction perpendicular to the substrate. The page buffers are connected to the cell strings through bit lines, the page buffers being configured to provide precharge voltages to the bit lines during a read operation. Levels of the precharge voltages provided to the bit lines vary depending on distances between the cell strings and at least one of the first and second doping regions, respectively.