Nonvolatile Memory Precharge Voltage Boosting for Program Disturbance
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Solution Overview
Problem
NOR-type flash memories have high current consumption, limiting their integration, while NAND-type flash memories have low cell current consumption but can suffer from program disturbance due to differences in data states between adjacent page buffers during programming operations.
Innovation Solution
A method is introduced where the precharge voltage of bit lines is determined by the data state in adjacent page buffers, with an increased voltage applied to bit lines connected to program inhibited cells to reduce program disturbance, using a high voltage generator and voltage boosting techniques between bit lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If NAND-type flash memories are used to reduce cell current consumption, then integration is improved, but program disturbance occurs due to data state differences between adjacent page buffers
Solution Approach 1:
The patent applies different precharge voltages to different bit lines based on the data states of adjacent page buffers. When adjacent page buffers have different data states (one has '1' and the other has '0'), the bit line connected to the page buffer with '1' receives an increased precharge voltage to prevent program disturbance. This local differentiation of voltage conditions resolves the contradiction by maintaining low current consumption while preventing disturbance in specific locations where it is needed.
Solution Approach 2:
The patent applies an increased precharge voltage to bit lines before the programming operation to counteract potential program disturbance. By preliminarily boosting the voltage on bit lines that will be adjacent to programmed cells, the system creates a protective effect that prevents unwanted tunneling current in program inhibited cells before the main programming pulse is applied.
2Speed
If NOR-type flash memories are used to achieve high speed, then programming speed is improved, but current consumption increases limiting integration
Solution Approach 1:
The patent changes the voltage parameter dynamically based on the programming operation requirements. By applying an increased precharge voltage only when and where needed (when adjacent page buffers have different data states), the system maintains the speed advantages of NOR-type architecture while reducing overall current consumption through selective voltage application rather than continuous high voltage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances channel boosting efficiency and reduces program disturbance by applying an increased precharge voltage to susceptible program inhibited cells, improving programming accuracy and integration in nonvolatile memory devices.
Implementation Method 1
the increased precharge voltage is obtained from a boosting using a coupling between the first bit line and the second bit line
Data Source
AI summary
A method of programming a nonvolatile memory device according to the present invention includes precharging bit lines according to data loaded in page buffers; electrically connecting the precharged bit lines to channels corresponding to the bit lines, respectively, to charge the channels; and applying a word line voltage for a program after charging the channels. A channel voltage boosting of each of the channels is determined according to data loaded in adjacent page buffers.