Semiconductor Memory Device Program Grouping for Speed

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Solution Overview

Problem

Semiconductor memory devices face challenges in improving program speed during program operations due to the limitations of existing nonvolatile memory devices, which have relatively low read and write rates.

Innovation Solution

A semiconductor memory device and operating method that group multiple program states into two or more program groups, allowing for sequential programming based on generated grouping information, optimizing the program operation by adjusting voltage levels and applying program inhibition or allowable voltages accordingly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If nonvolatile memory devices are used to maintain data without power supply, then data retention capability is improved, but program speed deteriorates

Engineering Contradiction:
Improvedata retention capabilityVSAvoidprogram speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the program operation into multiple phases by dividing program states into two or more program groups. The controller sequentially processes different program groups in different phases, allowing simultaneous or overlapping operations within each phase. This segmentation enables parallel processing of multiple memory cells with different program states, thereby improving overall program speed while maintaining data retention capabilities of nonvolatile memory devices.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If program operation is performed on all memory cells, then data storage capacity is improved, but program time increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidprogram time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The controller performs preliminary classification of program states into different program groups before executing the program operation. By pre-organizing memory cells into groups based on their program states, the controller can apply optimized programming sequences and voltages for each group, reducing the overall program time required to store data across all memory cells while maintaining full data storage capacity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements periodic action by sequentially executing program operations on different program groups in a structured sequence. The controller cycles through multiple program groups, applying programming voltages and verifying results in repeated periodic phases. This periodic approach allows systematic coverage of all memory cells for full storage capacity while managing program time through efficient repetition and parallel processing within each cycle.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the program speed by uniformly programming memory cells across multiple program states, improving operation efficiency and completion times.

Implementation Method 1

applying program inhibition or allowable voltages accordingly

Methodology Applied
Scientific EffectVoltage application effect: Electric Field

Data Source

PatentUS10839912B2Semiconductor memory device, memory system including the semiconductor memory device, and operating method thereof
Publication Date: 2020.11.17 SK HYNIX INC
  • US10839912B2 patent drawing
  • US10839912B2 patent drawing
  • US10839912B2 patent drawing

AI summary

Disclosed are a semiconductor memory device, a memory system including the semiconductor memory device, and a method of operating the same. The memory system includes a controller receiving a host command and program data from a host, queueing a command in response to the host command, and generating grouping information by grouping a plurality of program states into two or more program groups, and a semiconductor memory device receiving a queued command, the program data, and the grouping information from the controller, performing a program operation, and sequentially programming the two or more program groups on the basis of the grouping information.