Memory Device Program Loops for Voltage Distribution
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Solution Overview
Problem
Current memory devices face challenges in optimizing threshold voltage distribution during program operations, particularly in multi-level cell methods like TLC and QLC, which can lead to increased distribution width and longer program operation times.
Innovation Solution
The implementation of a memory device with a control logic circuit that selectively applies normal and double program methods, adjusting the number of program loops based on operation conditions such as program voltage and target voltage, to improve threshold voltage distribution and reduce program operation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a multi-level cell method (TLC or QLC) is used to store multiple bits in one memory cell, then storage capacity is improved, but threshold voltage distribution width increases and program operation time increases
Solution Approach 1:
The patent segments the program operation into multiple program loops, where each loop targets specific memory cells within a page. By dividing the program operation into iterative loops with verify operations, the system can progressively program memory cells to different threshold voltage levels (V1, V2, V3) corresponding to different data states, thereby achieving multi-bit storage while managing program time through controlled iterations
Solution Approach 2:
The patent dynamically adjusts the program operation by selectively applying different voltages (Vbl1, Vbl2, Vbl3) to bit lines during different program loops based on the current state of memory cells. This dynamic voltage adjustment allows the system to optimize programming speed for cells at different threshold voltage levels, improving overall program operation efficiency while maintaining accurate threshold voltage distribution
2Quantity of substance
If a multi-level cell method (TLC or QLC) is used to store multiple bits in one memory cell, then storage capacity is improved, but threshold voltage distribution width increases
Solution Approach 1:
The patent segments the memory cell population into different groups based on their threshold voltage states, with each program loop targeting specific groups. By applying selective voltages to different bit lines during different loops, the system can precisely control the threshold voltage distribution of memory cells storing different data states, thereby maintaining narrow distribution width despite storing multiple bits per cell
Solution Approach 2:
The patent applies different voltage levels (Vbl1, Vbl2, Vbl3) to different bit lines during program loops, creating local quality variations in the programming process. This allows memory cells connected to different bit lines to receive tailored programming conditions, ensuring precise threshold voltage control for cells at different programming stages and maintaining tight voltage distribution
3Manufacturing precision
If the number of program loops is increased to improve threshold voltage distribution, then voltage distribution is improved, but program operation time increases
Solution Approach 1:
The patent implements periodic program loops with integrated verify operations, where each loop consists of a program phase followed by a verify phase. This periodic structure allows the system to check threshold voltage attainment at regular intervals and terminate loops early when targets are reached, balancing voltage distribution quality with program operation time by avoiding unnecessary iterations
Data Source
AI summary
The present technology includes a memory device and a method of operating the memory device. The memory device includes a memory block including memory cells, a peripheral circuit configured to perform a plurality of program loops to cause a threshold voltage of selected memory cells included in a selected page among the memory cells to attain a target voltage, and a control logic circuit configured to control the peripheral circuit to perform the program loops by selectively applying a normal program or a double program to the program loops.