Nonvolatile Memory Program Start Voltage Adjustment
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Solution Overview
Problem
Nonvolatile memory devices face inefficiencies in program speed and verify operation time due to the increasing number of program/erase operations, which affect the distribution of threshold voltages and require multiple verify voltages, leading to over-programming and increased program time.
Innovation Solution
A nonvolatile memory device with a page region containing normal and auxiliary cells, a detecting unit for outputting a pass signal when cells are programmed above a reference voltage, a count storing unit for storing program pulse counts, and a voltage setting unit that adjusts the program start voltage based on the stored counts to optimize program operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple verify voltages are used for MLC program operations, then programming precision is improved, but program time increases
Solution Approach 1:
The patent applies preliminary action by performing a test program operation before the actual program operation to measure program speed and determine the number of verify operations needed. This preliminary measurement allows the system to pre-calculate optimal verify voltage application strategy, reducing the time lost during actual programming by avoiding unnecessary verify operations.
Solution Approach 2:
The patent implements dynamics by making the number of verify operations adaptive rather than fixed. The verify operation count is dynamically adjusted based on measured program speed and threshold voltage distribution characteristics. This dynamic adjustment allows the system to reduce verify operations when program speed is fast, thereby reducing program time while maintaining programming precision.
2Manufacturing precision
If verify operations are performed multiple times after each program pulse, then programming precision is improved, but program speed decreases
Solution Approach 1:
The patent applies partial action by performing fewer verify operations than the maximum possible number. Instead of always performing three verify operations after each program pulse, the system performs only the necessary number of verify operations based on measured program speed. This partial execution of verify operations maintains programming precision while improving program speed by eliminating redundant verify steps.
Solution Approach 2:
The patent implements feedback by measuring program speed through test operations and using this information to adjust the number of verify operations. The system continuously monitors program speed and threshold voltage distribution, then feeds this information back to determine the optimal verify operation count, creating a closed-loop control system that balances precision and speed.
3Productivity
If program speed increases with more program/erase operations, then productivity is improved, but verify operation time increases due to threshold voltage distribution changes
Solution Approach 1:
The patent applies preliminary action by performing test program operations before actual programming to measure program speed and threshold voltage distribution. This preliminary measurement allows the system to pre-determine the optimal number of verify operations needed, preventing excessive verify operation time while maintaining programming accuracy despite changes in program speed.
Solution Approach 2:
The patent implements parameter changes by adjusting the number of verify operations based on measured program speed and threshold voltage distribution characteristics. When program speed increases due to more program/erase operations, the system modifies the verify operation count parameter to optimize verify time, thereby preventing verify operation time from increasing despite speed improvements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes verify operation time by dynamically adjusting the program start voltage, reducing the number of verify operations, and preventing over-programming, thereby improving program speed and efficiency as the number of program/erase cycles increases.
Implementation Method 1
The program and erase operations of nonvolatile memory cells are performed by changing threshold voltages of cells, where the threshold voltage changes occur due to electrons that are moved by a strong electric field applied to a thin oxide layer.
Data Source
AI summary
A nonvolatile memory device includes a page region including a plurality of normal cells and a plurality of auxiliary cells, a detecting unit configured to output a pass signal when at least one cell is programmed with a voltage higher than a reference voltage among program target cells of the page region, a count storing unit configured to store a count in the plurality of auxiliary cells during a first program operation for the page region, wherein the count indicates a total number of program pulses applied to the at least one cell until the pass signal is outputted from the detecting unit, and a voltage setting unit configured to set a program start voltage for a second program operation of the page region based on the count stored in the plurality of auxiliary cells.