Non-volatile Memory Programming Voltage Control
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Solution Overview
Problem
Conventional non-volatile memory devices face performance and reliability issues due to improper control of voltages during programming, read, and erase operations, leading to inferior device performance and reliability.
Innovation Solution
The memory device employs a method to control voltages during programming operations by applying different voltage levels to access and data lines, using verify voltages to determine threshold voltage values, and adjusting voltage settings based on the progress of programming cells to ensure accurate and efficient programming across multiple levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage control methods are used during programming operations, then the programming process can be completed, but device performance and reliability deteriorate due to improper voltage control
Solution Approach 1:
The patent implements dynamic voltage control by adjusting voltage levels based on the programming stage and cell state. Different voltage levels are applied during different phases of programming operations, and voltages are modified based on verify results, transforming static voltage control into a dynamic process that adapts to real-time conditions to improve both reliability and precision.
Solution Approach 2:
The patent employs feedback mechanisms where verify operations assess the programming status of memory cells, and this information feeds back to adjust subsequent programming voltages. This closed-loop control ensures that voltage parameters are optimized based on actual programming progress, resolving the contradiction between reliability and voltage control precision.
2Productivity
If multiple memory cells are programmed concurrently at different levels, then programming efficiency improves, but voltage control complexity increases
Solution Approach 1:
The patent segments memory cells into different groups based on their programming levels and states. By dividing the memory array into segments that can be programmed concurrently at different voltage levels, the system achieves parallel processing efficiency while managing voltage control complexity through organized categorization of cells.
Solution Approach 2:
The patent applies local quality control by assigning different voltage levels to different groups of memory cells based on their specific programming requirements. This allows concurrent programming operations with optimized voltage parameters for each cell group, improving overall efficiency while maintaining manageable control complexity through localized voltage management.
3Measurement precision
If verify operations are performed frequently to ensure programming accuracy, then programming precision improves, but operation time increases
Solution Approach 1:
The patent applies partial verify operations that are strategically placed at critical programming stages rather than continuously verifying throughout the entire process. This selective verification approach ensures sufficient programming accuracy at key decision points while minimizing the time overhead of excessive verify operations.
Data Source
AI summary
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of memory cells during a programming operation. Such a method applies the voltages to the data lines associated with a last group of memory cells being programmed in a different fashion from the other groups of memory cells after the other groups of memory cells have been programmed. Other embodiments including additional memory devices and methods are described.