Semiconductor Memory Programming Voltage Control
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Solution Overview
Problem
The reliability of data stored in multi-level cell (MLC) semiconductor memory devices deteriorates due to decreasing distance between threshold voltage distributions as the number of bits programmed increases, requiring improved methods to control threshold voltage distributions efficiently.
Innovation Solution
A method involving a first program operation with a specific first program voltage applied to a selected word line for a set time, followed by a second program operation using a step pulse program voltage gradually rising from a start voltage lower than the first program voltage, effectively narrowing the threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a small step voltage is used to tightly control the threshold voltage distribution, then the reliability of data is improved, but the program operation time increases significantly
Solution Approach 1:
The patent divides the program operation into multiple loops with different step voltages. In early loops, a larger step voltage is applied to quickly program fast cells, while in later loops, a smaller step voltage is applied to precisely control slow cells. This segmentation of the programming process by loop stage resolves the contradiction between speed and precision.
Solution Approach 2:
The patent dynamically adjusts the step voltage based on the programming loop stage. The step voltage is set to a first value in early loops and a second value in later loops, allowing the system to adapt its programming aggressiveness to the actual state of memory cells. This dynamic adjustment optimizes both programming speed and threshold voltage control precision.
2Quantity of substance
If the number of bits programmed in a cell increases to increase memory capacity, then the storage capacity is improved, but the distance between threshold voltage distributions decreases causing reliability deterioration
Solution Approach 1:
The patent performs preliminary programming actions in early loops with larger step voltages to establish broad threshold voltage separation. This preliminary action creates sufficient initial distance between threshold voltage distributions, which is then refined in later loops. This preliminary broad programming prevents the threshold voltage distributions from becoming too crowded, maintaining reliability in multi-bit cells.
Solution Approach 2:
The patent changes the programming parameter (step voltage) based on the loop stage to maintain optimal threshold voltage distribution separation. By adjusting the step voltage from a first value to a second value across different loops, the system maintains adequate distance between threshold voltage distributions even when programming multiple bits per cell, thus preserving data reliability while achieving high capacity.
3Speed
If a high program voltage is applied to quickly program memory cells, then the program speed is improved, but the threshold voltage distribution becomes too wide reducing precision
Solution Approach 1:
The patent employs periodic programming actions with alternating patterns of larger and smaller step voltages across different loops. This periodic variation allows the system to periodically apply strong programming pulses for speed while also applying gentler pulses for precision control. The rhythmic alternation between aggressive and conservative programming maintains both speed and threshold voltage precision.
Solution Approach 2:
The patent applies preliminary strong programming actions in early loops to quickly move most cells toward their target threshold voltages. This preliminary high-speed programming handles the bulk of the programming task efficiently. Subsequent loops then apply smaller step voltages to fine-tune and precisely control the threshold voltage distribution, correcting any overshoot and narrowing the distribution width.
Data Source
AI summary
A method of programming a semiconductor memory device includes a first program step for performing a program by supplying a first program voltage, having a specific amount, to a selected word line of the semiconductor memory device for a set time and a second program step for performing a program by supplying, to the selected word line, a second program voltage which is a step pulse gradually rising from a start voltage lower than the first program voltage.