Concurrent Memory Protection and Address Translation

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Solution Overview

Problem

Existing data processing systems face challenges in handling memory access operations efficiently, particularly when combining multiple software applications on a single processor, as legacy software compiled in non-position-independent manner can cause address conflicts, and real-time systems require deterministic response times which are not met by traditional memory protection and address translation units.

Innovation Solution

A data processing apparatus that combines a memory protection unit and an address translation unit, allowing selection based on target addresses for handling memory access operations, with the memory protection unit determining permission and the address translation unit translating virtual addresses to physical addresses, and both units operating concurrently to support deterministic and relocatable memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a memory protection unit is used to ensure deterministic response times in real-time systems, then response time predictability is improved, but the system cannot handle legacy software with address conflicts

Engineering Contradiction:

Improveresponse time predictabilityVSAvoidsoftware compatibility

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically switches between two operational modes: using the memory protection unit for real-time deterministic operations and using the address translation unit for legacy software compatibility. The mode selection is based on the specific memory access requirements and software type being executed, allowing the system to adapt its behavior rather than being fixed in one approach.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the address space interpretation parameter based on which unit is active. When the memory protection unit is active, addresses are interpreted as physical addresses for deterministic access. When the address translation unit is active, addresses are interpreted as virtual addresses that need translation, enabling legacy software to run without conflicts.

Inventive Principle:

Principle #35Parameter changes

2Adaptability or versatility

If an address translation unit is used to support legacy software with virtual addresses, then software compatibility is improved, but response time becomes non-deterministic

Engineering Contradiction:

Improvesoftware compatibilityVSAvoidresponse time predictability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The address space is segmented into regions that are handled by different units. The memory protection unit handles segments requiring deterministic physical address access, while the address translation unit handles segments containing legacy virtual addresses. This segmentation allows each unit to operate in its optimal mode without interfering with the other.

Inventive Principle:

Principle #1Segmentation

3Reliability

If only a memory protection unit is used, then deterministic memory access is achieved, but address translation for relocatable code is not supported

Engineering Contradiction:

Improvememory access determinismVSAvoidaddress translation capability

Core Design Contradiction:

ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system merges the memory protection unit and address translation unit into a single integrated apparatus that can handle both functions. By combining these two previously separate units, the system achieves both deterministic memory access protection and virtual-to-physical address translation capabilities within one unified structure.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The integrated apparatus provides multi-functionality by incorporating both memory protection and address translation capabilities. This universal design allows the single apparatus to handle diverse memory access requirements including real-time deterministic operations, legacy software compatibility, and relocatable code execution without requiring separate dedicated units.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If only an address translation unit is used, then virtual address translation is supported, but deterministic response times cannot be guaranteed

Engineering Contradiction:

Improvevirtual address supportVSAvoidresponse time determinism

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

Inventive Principle:

Principle #15Dynamics

Data Source

PatentUS9940268B2Handling memory access protection and address translation in a data processing apparatus

Publication Date: 2018.04.10 ARM LTD

AI summary

A processing apparatus has a memory protection unit (MPU) 38 and an address translation unit (ATU) 120 which operate concurrently for memory access operations performed by processing circuitry 22. The MPU 38 stores access permission data for corresponding regions of an address space. The ATU 120 stores address translation entries for defining virtual-to-physical mappings for corresponding pages of the address space. In response to a memory access operation specifying a target address, one of the MPU 38 and the ATU 120 is selected to handle the memory access operation based on the target address. If the MPU 38 is selected then the target address is a physical address and the MPU 38 checks access permissions using a corresponding set of permission data. If the ATU 120 is selected then the target address is a virtual address and is translated into a physical address using a corresponding translation entry.