Non-Volatile Memory Programming Pulse Segmentation for Data Integrity
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Solution Overview
Problem
Flash memory devices experience data loss due to charge leakage, leading to unintended changes in threshold voltage and errors in stored data, as the threshold voltage may drop below the target voltage during the verification operation.
Innovation Solution
A semiconductor device with an operation circuit that applies a main program pulse followed by a sub program pulse with a lower voltage level to the word line, performing a program loop that includes both the program operation and verification operation, thereby minimizing charge leakage and maintaining data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single program pulse is applied to program memory cells, then the programming operation is simple and fast, but charge leakage occurs and the threshold voltage drops below the target voltage
Solution Approach 1:
The patent divides the single program pulse into multiple sub-pulses (first program pulse, second program pulse, third program pulse) with different voltage levels. This segmentation allows the threshold voltage to be built up in controlled steps, preventing charge leakage while maintaining programming speed. The verification operation is also segmented into multiple verification pulses.
Solution Approach 2:
The patent implements periodic verification operations between program pulses. After applying the first program pulse, a verification operation is performed, then the second program pulse is applied, followed by another verification operation. This periodic verification ensures the threshold voltage reaches and maintains the target level, preventing under-programming.
2Reliability
If the threshold voltage is increased to prevent charge leakage, then data integrity is improved, but the programming operation becomes more complex and time-consuming
Solution Approach 1:
The patent changes the voltage parameter of the program pulses in a controlled sequence. The first program pulse uses a first voltage level, the second program pulse uses a second voltage level (higher than the first), and the third program pulse uses a third voltage level (higher than the second). This parameter change approach systematically builds the threshold voltage while maintaining manageable operation complexity.
3Measurement precision
If multiple verification operations are performed to ensure data accuracy, then under-programming is prevented, but the programming time increases
Solution Approach 1:
The patent performs verification operations at specific predetermined points during the programming sequence (after the first program pulse, after the second program pulse) to detect under-programmed cells early. This preliminary verification allows the system to identify and correct issues before final programming is complete, reducing the need for extensive re-verification and overall programming time.
Data Source
AI summary
A semiconductor device includes a memory block including memory cells connected to a word line, and an operation circuit suitable for consecutively applying a main program pulse and a sub program pulse to the word line to perform a program operation of the memory cells, and suitable for performing a program verification operation of the memory cells, wherein the sub program pulse has a lower voltage level than the main program pulse.