Semiconductor Memory Read Abort via Upper Page Flag

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Solution Overview

Problem

As the number of bits stored in a single memory cell increases, the complexity of data determination algorithms worsens, leading to performance degradation in reading operations in semiconductor memory devices.

Innovation Solution

A semiconductor memory device with a memory cell array, a first circuit for programming, and a second circuit for reading, where the second circuit manipulates a flag to abort threshold voltage measurement if the upper page data has not been programmed, optimizing the reading process by reducing unnecessary voltage sweeps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of bits stored in a single memory cell is increased, then the storage capacity is improved, but the complexity of data determination algorithms increases and reading performance deteriorates

Engineering Contradiction:
Improvestorage capacityVSAvoidreading performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent segments the reading process into multiple stages with multiple reading operations. Instead of performing a single complex determination algorithm for multi-bit data, the system divides the reading into sequential steps, each handling a portion of the data determination, thereby reducing the complexity of individual algorithms while maintaining high storage capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by performing initial reading operations to determine certain bit values before completing the full data determination process. The system uses preliminary read results to guide subsequent reading operations, avoiding the need to execute complete complex algorithms for all bits simultaneously, thus improving reading performance while preserving multi-bit storage capability

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If the algorithm for determining data is made more complex to handle more bits per cell, then the storage capacity is improved, but the reading time increases

Engineering Contradiction:
Improvebits per memory cellVSAvoidreading time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent implements periodic action by executing multiple reading operations in sequence rather than performing one lengthy operation. Each reading operation processes a subset of the data determination, allowing the system to retrieve multi-bit data through periodic, shorter operations that reduce overall reading time compared to a single complex algorithm execution

Inventive Principle:
Principle #19Periodic action

3Measurement precision

If threshold voltage measurement is completed for all ranges, then measurement precision is improved, but reading time increases when upper page data has not been programmed

Engineering Contradiction:
Improvethreshold voltage measurement accuracyVSAvoidread time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies feedback by using the result of the first reading operation to determine whether to proceed with subsequent reading operations. If the first read indicates that upper page data has not been programmed, the system feedback-controls the cessation of further reading operations, thereby maintaining measurement precision for necessary data while eliminating wasteful time consumption from unnecessary measurements

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9543033B1Semiconductor memory device, control method, and memory system
Publication Date: 2017.01.10 KIOXIA CORP
  • US9543033B1 patent drawing
  • US9543033B1 patent drawing
  • US9543033B1 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a memory cell array, a first circuit, and a second circuit. The first circuit executes program and read. The program is processing for changing a threshold voltage of a memory cell to a voltage according to data. The data includes first data of a bit and second data of a bit. The program of the second data is executed after the program of the first data. The read includes measuring the threshold voltage. The second circuit manipulates a flag in accordance with execution of the program of the second data. In a case where the second data is a target of the read, the second circuit refers to the flag. In a case where the flag indicates non-execution of the program of the second data, the second circuit aborts the measuring before the measuring of the threshold voltage is completed.