Semiconductor Memory Device Read Operation Channel Potential Control

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Solution Overview

Problem

As semiconductor memory devices become more integrated, memory cell size decreases and space between cells narrows, leading to reduced cell current and deteriorated operational characteristics.

Innovation Solution

A semiconductor memory device with a memory block configuration that includes memory strings coupled to bit lines and a common source line, along with a peripheral circuit that performs read operations by increasing the channel potential of unselected memory strings, supplying appropriate voltages to bit lines and memory cells, and sensing voltage or current on selected bit lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cell size is decreased to increase integration degree, then device integration is improved, but cell current reduces and operational characteristics deteriorate

Engineering Contradiction:
Improveintegration degreeVSAvoidoperational characteristics
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by differentiating the treatment of selected and unselected memory strings. Unselected memory strings receive a channel potential increase through specific voltage applications to source and bit lines, while selected memory strings undergo normal read operations. This localized differentiation maintains cell current in unselected strings to prevent read disturb, thereby preserving operational characteristics despite reduced cell size from increased integration.

Inventive Principle:
Principle #3Local quality

2Area of stationary object

If space between memory cells is narrowed to increase integration, then device integration is improved, but cell current reduces

Engineering Contradiction:
Improvespace between memory cellsVSAvoidcell current
Core Design Contradiction:
Area of stationary objectVSQuantity of substance

Solution Approach 1:

The patent changes voltage parameters dynamically during read operations. By applying specific voltages to source and bit lines of unselected memory strings, the channel potential is increased, which compensates for the reduced cell current resulting from narrower spacing between memory cells. This parameter adjustment maintains sufficient current flow despite the physical constraints of high integration density.

Inventive Principle:
Principle #35Parameter changes

3Ease of operation

If read operation is performed on selected memory strings, then data reading is achieved, but read disturb occurs in unselected memory strings

Engineering Contradiction:
Improveread operationVSAvoidread disturb
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The patent implements preliminary anti-action by proactively increasing the channel potential of unselected memory strings before or during the read operation on selected memory strings. By applying appropriate voltages to the source and bit lines of unselected strings, the method creates a protective potential barrier that counteracts the harmful electric field effects from selected string operations, thereby preventing read disturb before it can occur.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances operational characteristics by increasing current flowing in the selected memory string and reducing the impact of read disturb, leading to more uniform and reliable performance.

Implementation Method 1

the peripheral circuit may include a first capacitor coupled between a source line and a bit line, and a second capacitor coupled between the source line and the bit line

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Data Source

PatentUS8937833B2Semiconductor memory device including memory cells and a peripheral circuit and method of operating the same
Publication Date: 2015.01.20 SK HYNIX INC
  • US8937833B2 patent drawing
  • US8937833B2 patent drawing
  • US8937833B2 patent drawing

AI summary

A semiconductor memory device includes a memory block including memory strings coupled to and disposed between bit lines and a common source line, and a peripheral circuit configured to perform a read operation of memory cells included in selected memory strings of the memory strings and increase channel potential of unselected memory strings in the read operation.