Memory Read Control Circuit with Adaptive Voltage Retry Sequences
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Solution Overview
Problem
Conventional storage devices take a long time to search for suitable compensation voltages, leading to low read efficiency due to memory aging influenced by environmental factors and usage conditions.
Innovation Solution
A control circuit with a storage circuit and processor that stores a retry sequence table and read-voltage tables, performing sequential retry tests on memory blocks using these tables and adjusting the retry sequence based on retry history data to optimize read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional storage devices use fixed retry sequences for read errors, then the read operation can be performed systematically, but the read efficiency is low due to long search time for suitable compensation voltages
Solution Approach 1:
The patent pre-establishes multiple read-voltage tables with different compensation voltage sets and a retry sequence table before read operations occur. When a read error happens, the processor immediately retrieves and applies the pre-defined retry sequence from the retry sequence table, eliminating the need for real-time search and significantly reducing the time loss.
Solution Approach 2:
The patent introduces dynamic adaptation by allowing the retry sequence to be adjusted based on retry history data. The processor monitors read error patterns and modifies the retry sequence dynamically to optimize performance for specific memory aging states, transforming the static retry mechanism into a dynamic one that adapts to changing conditions.
2Adaptability or versatility
If the storage device stores multiple sets of compensation voltages for different aging states, then the read operation can be optimized for various conditions, but the device complexity increases
Solution Approach 1:
The patent segments the compensation voltage management by dividing it into multiple independent read-voltage tables, each containing a specific set of compensation voltages for different aging states. This segmentation allows the system to handle complexity through modular organization, where each table can be independently managed and selected based on the detected aging state.
Solution Approach 2:
The patent introduces a retry sequence table as an intermediary structure that mediates between the multiple read-voltage tables and the read operation. The retry sequence table stores predefined sequences that indicate which read-voltage table to apply under specific conditions, simplifying the control logic by providing a centralized mapping mechanism rather than complex decision-making circuits.
3Reliability
If the processor sequentially uses multiple read-voltage tables for retry tests, then the read error can be recovered, but the read time increases
Solution Approach 1:
The patent pre-defines optimal retry sequences in the retry sequence table based on statistical analysis of read error patterns. This preliminary preparation ensures that when a read error occurs, the processor immediately executes the most effective retry sequence without needing to test multiple sequences sequentially, thereby maintaining high reliability while minimizing retry test time.
Solution Approach 2:
The patent implements feedback mechanisms by monitoring retry history data and using it to adjust the retry sequence dynamically. The system learns from past read errors and optimizes the retry sequence accordingly, improving reliability over time while reducing the average retry test time through intelligent adaptation rather than brute-force sequential testing.
Data Source
AI summary
A control circuit, comprising a storage circuit and a processor. The storage circuit is configured to store a retry sequence table and a plurality of read-voltage tables. The processor is coupled to the storage circuit, and is configured to access a memory comprising a plurality of blocks. When a read error occurs in a first block of the plurality of blocks, the processor sequentially uses the plurality of read-voltage tables to perform a retry test on the first block according to a retry sequence indicated by the retry sequence table. When a retry history data of the first block matches an adjustment condition, the processor adjusts the retry sequence indicated by the retry sequence table.