Semiconductor Memory Read Disturbance Prevention via Select Line Discharge
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Solution Overview
Problem
Semiconductor memory devices face challenges in maintaining data reliability due to issues like local boosting and read disturbance, which occur during the discharge period in read operations, leading to potential data corruption.
Innovation Solution
The semiconductor memory device employs a method where a pass voltage is applied to selected and unselected word lines, with specific reference times for discharging select lines and word lines, ensuring that select lines are discharged before word lines, thereby preventing local boosting and read disturbance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If select lines and word lines are discharged simultaneously, then the discharge process is simple and fast, but local boosting and read disturbance occur causing data corruption
Solution Approach 1:
The discharge process is segmented into two distinct phases: first discharging select lines (DSL, SSL), then discharging word lines (WL). This segmentation prevents simultaneous discharge of all lines, thereby avoiding local boosting and read disturbance while maintaining manageable control complexity through sequential operation.
Solution Approach 2:
The select lines are discharged before the word lines in the read operation. This preliminary discharge of select lines ensures that no current flows through unselected memory cells during the subsequent word line discharge, preventing read disturbance and local boosting effects that would occur with simultaneous discharge.
2Reliability
If pass voltage is applied to both selected and unselected word lines, then read disturbance is prevented, but the discharge timing becomes more complex
Solution Approach 1:
The discharge operation is divided into sequential stages: first discharging select lines while maintaining pass voltage on word lines, then discharging word lines after select lines are fully discharged. This segmentation allows read disturbance prevention through pass voltage application while managing discharge time through optimized sequencing rather than simultaneous discharge.
Data Source
AI summary
There are provided a semiconductor memory device having improved reliability and an operating method thereof. A semiconductor memory device includes a memory cell array including a plurality of strings coupled between a bit line and a source line, the plurality of strings including select transistors respectively coupled to select lines and a plurality of memory cells respectively coupled to a plurality of word lines, and a peripheral circuit for performing a read operation on selected memory cells among the plurality of memory cells. The peripheral circuit discharges the select lines earlier than the plurality of word lines in the read operation.