Semiconductor Memory Read Voltage Kick Stabilization
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in efficiently executing read operations due to RC delay in word lines, leading to potential read errors and longer read times.
Innovation Solution
The semiconductor memory device employs a controller to execute a read operation by applying different read voltages and utilizing kick operations on the word line, bit line, and source line to optimize voltage stabilization and data reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional read operations are used in semiconductor memory devices, then the read operation can be executed, but RC delay in word lines causes read errors and longer read times
Solution Approach 1:
The patent applies preliminary kick operations to bit lines and source lines before the actual read operation. These kick operations pre-charge or pre-discharge the bit lines and source lines to appropriate voltage levels, compensating for the RC delay effects that would otherwise cause read errors. By performing this preparatory action in advance, the memory device ensures that the voltage levels are stable and correct when the actual read operation begins, thereby improving read accuracy without significantly increasing total read time.
2Reliability
If kick operations are applied to compensate for RC delay, then read accuracy improves, but the operation sequence becomes more complex
Solution Approach 1:
The patent segments the read operation into distinct phases: kick operations on bit lines, kick operations on source lines, and the actual read operation. Each phase is independently controlled and optimized. The kick operations are separated into bit line kicks and source line kicks, allowing for independent timing and voltage level optimization. This segmentation makes the complex operation sequence more manageable and easier to control, while still achieving the goal of improving read accuracy through multiple kick operations.
Data Source
AI summary
A memory system includes a semiconductor memory device and a memory controller configured to send a command to the device. The device includes a memory cell connected between a bit line and a source line, a sense amplifier having a first transistor provided between at least two transistors of the sense amplifier and the bit line, and a sequencer. The sequencer, in response to the command, reads data stored by the memory cell by applying a first voltage to the first transistor and a second voltage to the source line during a first time period, applying a third voltage to the first transistor and a fourth voltage to the source line during a second time period after the first time period, and applying the first voltage to the first transistor and a fifth voltage to the source line during a third time period after the second time period.