Memory Read Voltage Offset Recovery for Lower NAND Latency
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory systems experience increased latency due to read error handling procedures, particularly in NAND systems, which involve complex calculations and multiple read operations to recover data from degraded memory cells, leading to poor performance.
Innovation Solution
Implementing a method to estimate read offsets using syndrome weights associated with data, allowing for a single read operation to correct errors by modifying the read voltage, thereby skipping latency-heavy steps in the read error handling procedure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex calculations and multiple read operations are performed to recover data from degraded memory cells, then data recovery reliability is improved, but read latency increases significantly
Solution Approach 1:
The patent pre-calculates and stores read offset values in a lookup table during manufacturing or initialization, based on expected syndrome weight ranges. When data recovery is needed, the system simply queries the pre-computed table using the actual syndrome weight as index, avoiding complex real-time calculations and reducing latency while maintaining recovery reliability
Solution Approach 2:
The patent creates a simplified model (lookup table) that copies the essential relationship between syndrome weights and read offsets without replicating the complex calculation process. This allows the system to retrieve recovery parameters instantly from the table rather than performing time-consuming computations during read operations
2Measurement precision
If multiple read operations with different voltages are performed to recover data, then data accuracy is improved, but procedure complexity increases
Solution Approach 1:
The patent changes the approach from dynamically calculating multiple voltage levels to selecting from a set of pre-determined voltage offsets stored in the lookup table. The system adjusts the read voltage by adding the pre-stored offset to the base read voltage, simplifying the procedure while maintaining the ability to recover data with different voltage levels based on syndrome weight
3Reliability
If traditional read error handling procedures are used, then comprehensive error recovery is achieved, but system performance deteriorates
Solution Approach 1:
The patent pre-computes and stores the relationship between syndrome weights and read offsets in a lookup table during initialization or manufacturing. During actual read operations, the system simply queries this pre-prepared table using the syndrome weight as an index, instantly retrieving the appropriate offset value without performing complex real-time calculations, thus maintaining error recovery capability while dramatically improving system performance
Solution Approach 2:
The patent replaces the mechanical/computational process of calculating read offsets with a simple table lookup operation. Instead of executing complex algorithms during read operations, the system substitutes this with a straightforward memory access to retrieve pre-computed values, significantly reducing processing time and improving overall system performance
Data Source
AI summary
Methods, systems, and devices for reducing latency for data recovery procedures in memory systems are described. A memory system may initialize an error recovery procedure in response to a failure to correct data read the memory system during a first read operation, where the first read operation is performed using a first read voltage. In response to the initialization, the memory system may identify, as part of the error recovery procedure, a first read offset from multiple read offsets according to a first syndrome weight generated as part of an attempt to correct the data. Accordingly, the memory system may perform, as part of the error recovery procedure, a second read operation to obtain the data, where the second read operation may be performed using a second read voltage that is the first read voltage modified by the first read offset.