Memory Read Modes Using Precharged Circuits for Faster Data Access
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Solution Overview
Problem
Conventional non-volatile memory access times are prolonged due to various operations such as activating charge pump circuits, calculating temperature compensation, and restoring circuits to initial conditions, which can be improved by reducing these sub-operations to enhance memory performance.
Innovation Solution
Implementing a first and second read mode in memory operations, where the second read mode involves precharging circuits and calculating temperature compensation before the read command, reducing the time required for activating charge pump circuits and preparing signal lines to a ready condition, thereby shortening the overall access time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional non-volatile memory access operations are performed with complete circuit activation and restoration, then data reliability is maintained, but access time is prolonged
Solution Approach 1:
The patent applies preliminary action by pre-charging signal lines and pre-positioning read circuits to a ready state before the actual read operation. This preparation work is done in advance during idle periods, so when a read command arrives, the circuits are already positioned to perform the operation quickly without requiring full activation time, thus reducing access time while maintaining data reliability
Solution Approach 2:
The patent segments the memory access operation into distinct phases: a preparation phase where circuits are partially activated and positioned, and an execution phase where the actual read occurs. By dividing the operation and maintaining circuits in intermediate states rather than fully activating them each time, the patent reduces the time penalty while preserving the necessary circuit functions for reliable data retrieval
2Productivity
If charge pump circuits are activated and circuits are restored to initial conditions, then subsequent operations are prepared, but overall access time increases
Solution Approach 1:
The patent maintains continuity of useful action by keeping charge pump circuits and signal lines in a partially activated ready state between operations rather than fully deactivating and restoring them. This continuous partial activation allows subsequent read operations to proceed immediately without the full restoration cycle, reducing access time while still preparing circuits for the next operation
Solution Approach 2:
The patent applies dynamics by transitioning circuits between different operational states - fully active during operations, partially active during idle periods, and selectively restored. Rather than static full restoration to initial conditions, the circuits dynamically maintain optimal intermediate states that reduce preparation time for subsequent operations while ensuring they are ready when needed
Data Source
AI summary
Apparatuses and methods including multiple read modes for reading data from a memory are described. An example apparatus includes a memory including a first read mode and a second read mode. The memory has a read operation for the first read mode including a first pre-access phase, an access phase, and a first post-access phase. The read operation for the second read mode includes a second pre-access phase, the access phase, and a second post-access phase. The read operation for either the first read mode or the second read mode is performed responsive to the memory receiving a read command. The second pre-access phase is different from the first pre-access phase, with the second pre-access phase having a shorter time than the first pre-access phase measured from receipt of the read command.