Memory Read Timing Compensation for Threshold Voltage Drift

The patent applies dynamics by making the read voltage level and read timing dynamic rather than fixed. The read voltage is adjusted based on the elapsed time since the last write operation, and the read timing is shifted by applying a time offset that varies with storage duration. This dynamic adaptation compensates for threshold voltage drift and maintains adequate read margin over time.

The patent changes physical parameters (voltage level and time timing) of the read operation based on the storage duration. Specifically, the read voltage level is adjusted and a time offset is applied to the read timing, where these parameters vary according to how much time has elapsed since the data was written. This parameter adaptation resolves the contradiction between fast fixed-time reading and reliable reading despite drift.

Instead of using a fixed high read voltage that risks disturbing data, the patent dynamically adjusts the read voltage level based on the elapsed time since write. When drift is minimal (short storage time), a lower read voltage is used. When drift increases (long storage time), the read voltage is increased appropriately. This time-dependent parameter adjustment maintains read margin while minimizing data disturbance risk.

The patent makes the read voltage dynamic rather than statically high. By adjusting the voltage level according to storage duration and combining it with a time offset in the read timing, the system achieves adequate read margin only when necessary, thereby avoiding unnecessary data disturbance that would occur with a constantly high read voltage.

The patent implements a self-service compensation mechanism where the memory system automatically adjusts its own read parameters based on stored metadata (write time information). The memory device monitors its own state, determines the elapsed time since write operations, and autonomously adjusts read voltage and timing without requiring external intervention or complex external control circuits.

The patent stores write time information as metadata at the time of writing, which serves as preliminary information for future read operations. This pre-stored timing data enables the memory system to proactively compensate for drift by using the recorded write time to determine appropriate read voltage levels and timing offsets, avoiding the need for complex real-time drift measurement and compensation circuits.