Block Read Voltage Control in Non-Volatile Memory
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Solution Overview
Problem
Existing memory systems face challenges in accurately reading data due to variations in threshold voltages of memory cell transistors over time, which can lead to incorrect data retrieval, especially in non-volatile memory systems.
Innovation Solution
The memory system employs a controller that calculates and updates both common and individual read voltages based on the threshold voltage distribution of memory cells, using a read voltage selection unit to apply the appropriate voltage for each block, ensuring accurate data reading by managing read voltage information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a fixed read voltage is used for all blocks, then device complexity is reduced, but data reading accuracy deteriorates due to threshold voltage variations
Solution Approach 1:
The patent divides the non-volatile memory into multiple blocks and assigns different read voltages to different blocks based on their threshold voltage distributions. This segmentation allows each block to be read with an optimized voltage, improving accuracy while managing complexity through structured organization.
Solution Approach 2:
The patent implements dynamic read voltage selection where the controller adapts the read voltage based on the specific block being accessed. The system transitions from a static fixed voltage to a dynamic voltage selection mechanism that responds to block characteristics, enhancing accuracy without requiring complete redesign of the memory architecture.
2Measurement precision
If individual read voltages are calculated for each block, then data reading accuracy is improved, but device complexity and processing time increase
Solution Approach 1:
The patent performs threshold voltage measurements and read voltage calculations in advance during programming operations. By pre-characterizing blocks and storing their optimal read voltages, the system avoids complex real-time calculations during data reading, improving accuracy while reducing operational complexity.
Solution Approach 2:
The memory system performs self-characterization through automatic threshold voltage measurement and read voltage optimization during normal operation. The system serves itself by autonomously determining and storing optimal read voltages for each block, eliminating the need for external intervention or complex manual configuration.
3Measurement precision
If read voltage is updated frequently to adapt to threshold voltage changes, then data reading accuracy is maintained, but productivity decreases due to additional processing
Solution Approach 1:
The patent performs read voltage optimization during programming operations rather than during read operations. By completing voltage characterization in advance, the system ensures accurate data reading without introducing additional processing steps during high-speed read operations, thus maintaining both accuracy and productivity.
Solution Approach 2:
The patent integrates read voltage optimization into the existing programming workflow, ensuring that voltage characterization occurs continuously as part of normal memory operation. This eliminates gaps in the useful action cycle and prevents productivity loss by making voltage optimization an inherent part of the programming process rather than a separate overhead task.
Data Source
AI summary
According to one embodiment, a memory system includes 1st-5th sub-memory regions and a controller, the controller being configured to: calculate a 1st voltage of the 1st sub-memory region in 1st processing; calculate a 2nd voltage of the 4th sub-memory region in 2nd processing; before the 1st processing, use a 3rd voltage when reading the 1st and 2nd sub-memory regions, and the 4th and the 5th sub-memory regions, and use a 4th voltage of the 3rd sub-memory region when reading the 3rd sub-memory region; use the 1st voltage when reading the 1st sub-memory region, use a 5th voltage calculated by using the 1st voltage when reading the 2nd, the 4th, and the 5th sub-memory regions, use a 6th voltage calculated by using the 2nd voltage when reading the 2nd and the 5th sub-memory regions.