Nonvolatile Memory Read Voltage Adjustment for Data Reliability

Solution Overview

Problem

Flash memory devices face challenges in data reliability due to reduced read margin and error bits caused by program and read disturbances, leading to vulnerability during read operations and the need for error correction methods.

Innovation Solution

A nonvolatile memory device employs a memory cell array with pages of nonvolatile memory cells distinguished by threshold voltages, using a first and second sampling read operation with different offset read voltages to adjust read voltage levels based on comparison results, allowing for autonomous adjustment of read voltage levels and improved data reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple data bits are stored in one memory cell to increase storage capacity, then storage capacity is improved, but read margin between adjacent program states is reduced

Engineering Contradiction:

Improvestorage capacityVSAvoidread margin

Core Design Contradiction:

Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent performs preliminary sampling read operations before the actual data read to detect the state of memory cells and identify error bits. By counting the number of memory cells in specific voltage regions and comparing with reference values, the system proactively identifies cells that may contain errors, allowing for corrective actions to be taken before the final data read operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the results of sampling read operations are used to adjust subsequent read operations. The controller compares the counted number of memory cells with reference values and determines whether to perform additional sampling reads or to proceed with the actual data read, using the feedback from sampling results to optimize the read process and improve data reliability.

Inventive Principle:

Principle #23Feedback

2Reliability

If error correcting methods are used to correct error bits, then data reliability is improved, but device complexity is increased

Engineering Contradiction:

Improvedata reliabilityVSAvoiddevice complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary sampling read operations before the actual data read to detect the state of memory cells and identify error bits. By counting the number of memory cells in specific voltage regions and comparing with reference values, the system proactively identifies cells that may contain errors, allowing for corrective actions to be taken before the final data read operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the results of sampling read operations are used to adjust subsequent read operations. The controller compares the counted number of memory cells with reference values and determines whether to perform additional sampling reads or to proceed with the actual data read, using the feedback from sampling results to optimize the read process and improve data reliability.

Inventive Principle:

Principle #23Feedback

3Reliability

If sampling read operations are performed to count memory cells, then data reliability is improved, but read operation time is increased

Engineering Contradiction:

Improvedata reliabilityVSAvoidread operation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent performs sampling read operations on only a portion of the memory cells (those in specific voltage regions identified by the sampling process) rather than all memory cells. This partial action approach allows the system to focus computational resources on identifying and correcting only the error-prone cells, thereby improving data reliability while minimizing the time penalty compared to reading all cells.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent implements a feedback mechanism where the results of sampling read operations are used to adjust subsequent read operations. The controller compares the counted number of memory cells with reference values and determines whether to perform additional sampling reads or to proceed with the actual data read, using the feedback from sampling results to optimize the read process and improve data reliability.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS10332607B2Methods of operating a nonvolatile memory device and the nonvolatile memory device thereof

Publication Date: 2019.06.25 SAMSUNG ELECTRONICS CO LTD

AI summary

In a method of operating a nonvolatile memory device including a memory cell array, where the memory cell array includes a plurality of pages, and each of the plurality of pages includes a plurality of nonvolatile memory cells, a first sampling read operation is performed to count a first number of memory cells in a first region of a first page selected from the plurality of pages, using a first default read voltage and a first offset read voltage, and a second sampling read operation is selectively performed to count a second number of memory cells in a second region of the first page, using the first default read voltage and a second offset read voltage, based on a comparison result of the first number and a first reference value. The second offset read voltage is different from the first offset read voltage.