Semiconductor Memory Read Voltage Self-Regulation
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Solution Overview
Problem
Current semiconductor memory devices face challenges in optimizing read operation speed and accurately setting read voltage, leading to reduced data reliability due to widened threshold voltage distributions, which requires external controller intervention and longer regulation times.
Innovation Solution
A semiconductor memory device and method that detects changed bits using multiple test voltages, determining the optimal read voltage by comparing the number of changed bits between page data read with different test voltages, allowing the device to self-regulate the read voltage without external controller intervention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple test voltages are applied to determine optimal read voltage, then data reliability is improved, but read operation time increases
Solution Approach 1:
The patent applies preliminary action by performing read operations with multiple test voltages before the actual read operation to determine the optimal read voltage. The peripheral circuit pre-determines which test voltage yields the most stable page data (fewest changed bits) and stores this information for use in subsequent read operations, thereby ensuring data reliability without adding time to the actual read process.
Solution Approach 2:
The patent segments the read operation into distinct phases: a voltage determination phase where multiple test voltages are applied to find the optimal voltage, and an actual read phase where data is read using the predetermined optimal voltage. This segmentation allows the time-consuming voltage determination to be performed separately and stored, so it does not impact the speed of actual read operations.
2Measurement precision
If external controller intervention is used to regulate read voltage, then voltage regulation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent implements self-service by enabling the memory device's peripheral circuit to autonomously determine the optimal read voltage without external controller intervention. The peripheral circuit applies multiple test voltages, compares the resulting page data to detect changed bits, and automatically selects the optimal voltage based on which test voltage produces the most stable data. This self-determination capability maintains voltage regulation accuracy while eliminating the need for complex external controller circuits.
Solution Approach 2:
The patent uses feedback mechanisms where the peripheral circuit monitors the output page data from read operations with different test voltages, compares the number of changed bits between successive page data, and uses this feedback information to determine which test voltage produces the most stable readings. This internal feedback loop enables accurate voltage regulation without external control.
3Speed
If read voltage is not accurately regulated, then read operation speed is improved, but data reliability deteriorates
Solution Approach 1:
The patent applies preliminary action by determining the optimal read voltage in advance through multiple test voltage applications and comparisons. The peripheral circuit identifies which test voltage produces the most stable page data (fewest changed bits) and stores this determination for use in actual read operations. This pre-determination ensures that the actual read operation can proceed at high speed using the already-optimized voltage without compromising data reliability.
Data Source
AI summary
A semiconductor memory device and a method of operating the same are provided. The method of operating the semiconductor memory device includes detecting a first group of changed bits between first and second page data, by comparing the first and second page data, which are read out using first and second test voltages from the memory cells, respectively, detecting a second group of changed bits between the second page data and a third page data, by comparing the second page data with the third page data read out from the memory cells using a third test voltage, comparing the numbers of the first and second groups of changed bits, and determining one of the first to third test voltages as a read voltage according to the comparing of the numbers of the first and second groups of changed bits.