Memory Read-Path Switching for Bit Retention Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Non-volatile memory devices face data reliability issues due to retention errors in bit cells with different states having varying susceptibility to failure, affecting power consumption and data integrity.
Innovation Solution
Implementing a bit-state indicator to determine the majority or minority bit value, storing data in preferred and non-preferred states based on bit distribution, and using a write/read circuit with switch paths to ensure accurate data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in bit cells with different states, then data capacity is increased, but retention errors increase due to varying susceptibility to failure
Solution Approach 1:
The patent applies local quality by differentiating between preferred and non-preferred states in bit cells. Each bit cell's state is evaluated individually, and data is stored preferentially in the preferred state to minimize retention errors. This localized optimization of storage quality resolves the contradiction by maintaining high data capacity while improving reliability through selective state assignment.
2Reliability
If bit-state indicator and switch paths are implemented, then data reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements preliminary action by determining the majority or minority bit value before data storage and setting a bit-state indicator in advance. This pre-processing step allows the write/read circuit to select appropriate switch paths proactively, reducing retention errors before they occur. The complexity introduced is offset by the preventive nature of this action, which simplifies error correction later.
Solution Approach 2:
The bit-state indicator serves as an intermediary element that mediates between the data to be stored and the switch paths in the write/read circuit. This indicator provides critical information about the bit distribution state, enabling the circuit to make informed decisions about data storage and retrieval paths. The intermediary resolves the contradiction by adding a simple signaling mechanism that significantly improves reliability without requiring complex circuit modifications.
3Productivity
If data is stored in non-preferred states to increase capacity utilization, then storage efficiency is improved, but power consumption increases
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the storage state selection based on bit distribution analysis. When the majority bit value indicates a preferred state, data is stored in that state to minimize power consumption. When capacity utilization needs to be increased, the system can selectively store in non-preferred states while using the bit-state indicator to manage the trade-off. This parameter-based control resolves the contradiction by allowing flexible adjustment between storage efficiency and power consumption based on system needs.
Data Source
AI summary
In a method of reading stored bits in bit cells, either a first read path or a second read path is selected as a reading path, based on a characterization bit which is read from the bit cells. The method includes reading a stored bit in a bit cell through a sense amplifier and through the reading path, and generating a sensed bit from the stored bit with the sense amplifier. A first output bit is generated from the sensed bit when the first read path is selected as the reading path, and a second output bit is generated from the sensed bit when the second read path is selected as the reading path. The first output bit and the second output bit are bitwise complement to each other.