Semiconductor Memory Ready Busy Signal Generator for Status Accuracy
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Solution Overview
Problem
Current semiconductor memory devices lack the ability to accurately determine the internal operation status due to the difference between internal and external ready busy signals, which can lead to miscommunication between the memory device and the controller.
Innovation Solution
A semiconductor memory device with a ready busy signal generator that selectively outputs either an internal ready busy signal or an external ready busy signal based on a status read control signal, allowing for accurate operation status indication to the controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the memory device outputs only the external ready busy signal, then the controller can determine device readiness, but the internal operation status cannot be accurately determined leading to miscommunication
Solution Approach 1:
The ready busy signal is segmented into two distinct signals: an internal ready busy signal that reflects the actual internal operation status, and an external ready busy signal that indicates device readiness to the controller. This segmentation allows the controller to accurately determine both internal status and external readiness without miscommunication.
Solution Approach 2:
A signal selector is introduced as an intermediary component that receives both internal and external ready busy signals and selectively outputs one of them based on control signals from the control logic. This intermediary resolves the contradiction by enabling accurate status determination while maintaining manageable device complexity through centralized control.
2Reliability
If the memory device selectively outputs internal or external ready busy signals, then accurate status information is provided to the controller, but additional control logic and signal routing are required
Solution Approach 1:
The signal selector serves multiple functions: it receives the external ready busy signal, receives the internal ready busy signal, and selectively outputs one of them based on control conditions. This multi-functionality improves communication reliability while minimizing the increase in device complexity by consolidating control in a single component.
Solution Approach 2:
The control logic receives control signals from the controller and uses this feedback to determine when to output the internal ready busy signal versus the external ready busy signal. This feedback mechanism ensures accurate status information is provided to the controller while maintaining systematic control over the signal generation process.
3Loss of information
If the internal ready busy signal is always output, then the controller can monitor internal operations, but the device cannot efficiently indicate readiness for new commands
Solution Approach 1:
The ready busy signal output is made dynamic through the signal selector, which can switch between outputting the internal ready busy signal and the external ready busy signal based on control conditions. This dynamic behavior allows the system to optimize between monitoring internal operations and indicating readiness for new commands, thereby maintaining both information accuracy and command processing efficiency.
Data Source
AI summary
A semiconductor memory device includes a memory cell array, a peripheral circuit, a ready busy signal generator, and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit is configured to perform one of a read operation, a write operation, and an erase operation on the memory cell array. The ready busy signal generator is configured to selectively output one of an internal ready busy signal and an external ready busy signal according to an operation of the semiconductor memory device. The control logic is configured to control operations of the peripheral circuit and the ready busy signal generator.