Resistive Memory Recovery Pulses for Write-Induced Cell Failure

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Solution Overview

Problem

Resistive memory devices, such as PCRAM, fail after a large number of write operations due to the formation of porous areas that render them non-responsive to write voltages, leading to a reduced lifespan.

Innovation Solution

A memory controller applies recovery pulses with higher amplitudes than regular write pulses to repair or prevent failure by reducing porous areas within the resistive memory devices, using a corrective or preventive approach.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If resistive memory devices are used for non-volatile storage, then data retention without power is improved, but the device lifetime is reduced due to porous area formation after repeated write operations

Engineering Contradiction:
Improvedata retention timeVSAvoiddevice lifetime
Core Design Contradiction:
Duration of action of stationary objectVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by performing recovery operations before the memory device actually fails. The controller monitors write operation counts and applies recovery pulses at predetermined intervals to prevent porous area formation before it renders the device non-functional, thereby extending device lifetime while maintaining data retention capability

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent utilizes parameter changes by applying recovery pulses with different voltage amplitudes and durations than regular write operations. The recovery pulses have higher voltage amplitudes and extended durations to reverse the porous area formation process, changing the physical state of the memory material to restore functionality

Inventive Principle:
Principle #35Parameter changes

2Duration of action of moving object

If recovery pulses with higher amplitudes are applied to repair memory cells, then device lifetime is extended, but energy consumption increases

Engineering Contradiction:
Improvedevice lifetimeVSAvoidenergy consumption
Core Design Contradiction:
Duration of action of moving objectVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by applying recovery pulses at predetermined intervals based on write operation counts rather than continuously or after every write operation. This periodic recovery approach extends device lifetime while minimizing energy consumption by activating high-amplitude recovery pulses only when necessary

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies discarding and recovering by temporarily accepting increased energy consumption during recovery operations as an investment to restore memory cell functionality. The high-energy recovery pulses are used to reverse degradation, effectively recovering the device's operational life with the understanding that energy is consumed during the recovery process

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS12603145B2System and method for extending lifetime of memory device
Publication Date: 2026.04.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12603145B2 patent drawing
  • US12603145B2 patent drawing
  • US12603145B2 patent drawing

AI summary

A method of extending a lifetime of a memory cell is provided. The method includes detecting, by a memory controller, whether a memory cell has failed or not; repairing, by the memory controller, the memory cell by applying a first pulse having a first amplitude to the memory cell, in response to determining that the memory cell has failed; and writing, by the memory controller, input data to the memory cell by applying a second pulse having a second amplitude less than the first amplitude, in response to repairing the memory cell. In one expect, the detecting includes writing, by the memory controller, additional input data to the memory cell; reading, by the memory controller, data stored by the memory cell; comparing, by the memory controller, the data stored by the memory cell with the additional input data; and determining whether the memory cell has failed according to the comparison.