Semiconductor Memory Redundancy Update for New Failed Columns
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Solution Overview
Problem
Nonvolatile memory devices cannot update redundancy column address information after packaging, rendering the entire memory chip unusable if additional failed columns occur, despite having redundant columns.
Innovation Solution
A semiconductor memory device with a memory array, an extra block for storing failed column address information, an operation circuit group, an error bit check circuit, and a control circuit that performs program loops and updates failed column address information when the number of error bits is within correctable limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundancy column address information is stored using fuse, then the memory device can replace failed columns with redundancy columns, but the entire memory chip becomes unusable when additional failed columns occur after packaging process
Solution Approach 1:
The patent changes the storage medium parameter from fuse (non-updatable) to memory cells (updatable), enabling the failed column address information to be dynamically updated after packaging. This allows the memory device to adapt to new failed columns by storing their addresses in the extra block, thereby maintaining reliability while gaining update capability.
2Duration of action of stationary object
If the memory device performs update operation to add new failed column addresses, then the lifespan and reliability are improved, but the device complexity increases due to additional circuits and operations
Solution Approach 1:
The patent makes the operation circuit group multi-functional by enabling it to perform both normal memory operations on the memory block and error correction operations on the extra block. The control circuit integrates multiple functions including error bit checking, replacement determination, and address information updating, reducing the need for separate dedicated circuits and thereby managing complexity while extending device lifespan.
3Reliability
If the memory device uses an extra block to store failed column address information, then additional failed columns can be updated, but the area of the memory array increases
Solution Approach 1:
The patent segments the memory array into a functional memory block for data storage and an extra block for storing failed column address information. This segmentation allows the extra block to serve as a dedicated error management resource, enabling the device to handle additional failures while keeping the main memory block intact and functional.
Data Source
AI summary
A method of operating a semiconductor memory device according to an aspect of the present disclosure includes performing a program loop, including a program operation and a program verification operation, in order to store input data in selected memory cells, performing a first error bit check operation for comparing the number of error bits of data not identical with the input data, with the number of correctable error bits, if the number of error bits is equal to or smaller than the number of correctable error bits, performing a second error bit check operation for comparing the number of error bits with the reference number of bits for replacement determination, and if the number of error bits is greater than the reference number of bits for replacement determination, updating failed column address information by adding the column address of a memory cell, having the error bits, to the failed column address information.