Semiconductor Memory Redundant Decoder Segmentation
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Solution Overview
Problem
Existing semiconductor memory devices face difficulties in repairing defective memory cells, particularly when defects occur in both the lower and upper blocks of a memory cell array block, as there are no redundant column selecting signal lines available for replacement, leading to increased layout area and manufacturing costs.
Innovation Solution
The semiconductor memory device incorporates a redundant enable signal generating circuit and decoders that program and select redundant column selecting signal lines for both lower and upper blocks, allowing for the replacement of defective memory cells with redundant ones, even when defects occur in both blocks, by using independent redundant column selecting signal lines and decoders for each block.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single redundant column selecting signal line is used for each memory cell array block, then the layout area is reduced, but the device cannot repair defective memory cells when defects occur in both lower and upper blocks
Solution Approach 1:
The patent divides the redundant column selecting signal line into separate independent lines for lower and upper blocks. Each block has its own dedicated redundant column selecting signal line (RCSL1 for lower block, RCSL2 for upper block), allowing independent operation and repair capability without requiring additional shared resources.
Solution Approach 2:
The patent applies different redundant column selecting signal lines to different blocks based on their specific needs. The lower block uses RCSL1 while the upper block uses RCSL2, providing localized repair capability tailored to each block's defect requirements without unnecessary resource allocation to blocks that don't need repair.
2Ease of repair
If independent redundant column selecting signal lines are provided for lower and upper blocks, then both blocks can be repaired independently, but the device complexity increases
Solution Approach 1:
The decoder is segmented into separate decoder circuits for lower and upper blocks, with each decoder independently controlling its own redundant column selecting signal line. This segmentation enables independent repair operations while maintaining a relatively simple overall structure by avoiding complex inter-block coordination mechanisms.
3Reliability
If redundant column selecting signal lines are shared between blocks, then the layout area is minimized, but the reliability of defect repair is reduced when multiple blocks have defects
Solution Approach 1:
The patent segments the redundant column selecting signal lines into separate dedicated lines for lower and upper blocks, ensuring that each block has its own independent repair pathway. This eliminates the reliability issues associated with shared lines while keeping the layout area increase minimal by providing redundancy only where needed.
Data Source
AI summary
A semiconductor memory device includes a memory cell array a redundant enable signal generating circuit and redundant decoder. The memory cell array includes memory cell array blocks including column selecting signal lines and lower and upper blocks. The redundant enable signal generating circuit programming defective addresses, during a mode setting operation and generating a redundant enable signal when the defective addresses are applied during an operation. The redundant decoder including decoders selecting a corresponding redundant column selecting signal line in response to the redundant enable signal, a corresponding block address, and a lower and upper block address, wherein each of the of decoders is electrically connected to one of the lower and upper blocks.