Semiconductor Memory Refresh Management via Row Address Sampling
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Solution Overview
Problem
Semiconductor memory devices, particularly DRAM, face data loss due to 'row hammering' where frequently accessed rows cause adjacent cells to experience charge variations, leading to data damage, necessitating effective management of refresh operations to prevent this issue.
Innovation Solution
A method and system for managing semiconductor memory by sampling row addresses from an access stream, determining the most frequently accessed rows using probability information, and executing refresh operations on adjacent rows, with buffers to manage and prioritize these operations based on access frequency and probability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If refresh operations are performed on all rows, then data reliability is improved, but device complexity and resource usage increase
Solution Approach 1:
The patent applies local quality by differentiating refresh operations based on row access frequency. Instead of uniformly refreshing all rows, the system identifies and prioritizes refresh operations for rows adjacent to frequently accessed rows (target rows). This localized approach maintains data reliability in critical areas while reducing overall resource consumption and management complexity.
Solution Approach 2:
The patent implements partial action by performing refresh operations only on selected rows (those adjacent to target rows) rather than all rows. The refresh manager selectively identifies target rows based on access patterns and applies refresh operations only where necessary, avoiding excessive refresh operations on rarely accessed rows while maintaining sufficient protection against row hammering.
2Reliability
If all accessed addresses are managed, then row hammering prevention is improved, but device complexity and resource usage increase
Solution Approach 1:
The patent extracts the essential information needed for row hammering prevention by sampling row addresses from the access stream rather than managing all accessed addresses. The refresh manager selectively monitors and stores only the most frequently accessed rows (target rows) in a buffer, filtering out less critical access patterns. This extraction approach maintains effective row hammering prevention while significantly reducing management complexity and resource requirements.
Solution Approach 2:
The patent applies partial action by managing only a subset of accessed addresses (target rows with highest access frequency) rather than all addresses. The buffer mechanism stores and tracks only the most relevant rows, allowing the system to prevent row hammering on critical rows without the overhead of managing every accessed address in the memory array.
3Device complexity
If sampling period is increased, then resource usage is reduced, but measurement precision of access frequency decreases
Solution Approach 1:
The patent implements dynamics by using a configurable sampling period that can be adjusted based on system requirements. The sampling period is not fixed but can be dynamically optimized to balance between resource consumption and measurement precision. This allows the system to adapt to different access patterns and priority levels, ensuring sufficient precision for identifying target rows while maintaining acceptable resource usage.
Data Source
AI summary
A method of managing a semiconductor memory is provided which includes sampling a row address from an access stream on a memory cell array according to a sampling period; determining whether the sampled row address is an address corresponding to a target row which is most frequently accessed, based on probability information; and executing a refresh operation on rows adjacent to the target row.