Memory Refresh Module for Cell Current Degradation
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Solution Overview
Problem
Memory cells in non-volatile memory devices experience cell current degradation over time, leading to incorrect verification of programmed or erased data, which reduces the endurance and read margin of the memory device.
Innovation Solution
A method and system for refreshing memory cells by adjusting cell currents to ensure they remain below programmed or above erased verifying current levels, using high and low-level voltages applied to bit and word lines, and a refresh module to repeatedly rewrite data until the correct current levels are achieved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory cells are programmed or erased using high voltages on bit line and word line, then data storage capability is improved, but cell current degradation occurs over time reducing verification accuracy
Solution Approach 1:
The patent applies preliminary action by performing refresh operations on memory cells before the degradation becomes critical. The system proactively rewrites data to selected memory cells at predetermined intervals, preventing cell current degradation from reaching levels that would cause verification errors, thus maintaining reliability without sacrificing endurance
Solution Approach 2:
The patent implements periodic action through scheduled refresh operations where the controller systematically selects and rewrites data to memory cells at predetermined time intervals. This periodic maintenance approach ensures that cell currents remain within verification thresholds while minimizing the impact on overall memory operation and endurance
2Measurement precision
If refresh operations are performed repeatedly to eliminate cell current degradation, then verification accuracy is improved, but operation time and complexity increase
Solution Approach 1:
The patent applies local quality by selectively refreshing only those memory cells that require it, rather than uniformly refreshing all cells. The controller identifies specific selected memory cells based on their individual current levels and refreshes only those cells, thereby improving verification precision for affected cells while minimizing the overall time loss from refresh operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively eliminates cell current degradation, ensuring accurate verification of data and improving the endurance and read margin of the memory device by maintaining programmed and erased cell currents within predetermined levels.
Implementation Method 1
When a memory cell is programmed or erased, high voltages are applied on a bit line and a word line of the memory cell to enable the memory cell to store a logic data '0' or '1'
Implementation Method 2
When the memory cell is read, an output current or a threshold voltage of the memory cell is detected to obtain the logic data stored in the memory cell
Data Source
AI summary
A memory device for memory cell programming and erasing with refreshing operation is disclosed. The memory device includes multiple location-related memory cells and a refresh module. The location-related memory cells are coupled to a bit line on which a selecting voltage is applied. The refresh module rewrites a stored data of a first cell of the location-related memory cells to the first cell of the location-related memory cells in response to an operation count being smaller than a number N. N is related to the number of the location-related memory cells.