Volatile Memory Refresh Control for Reset Command Reliability
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Solution Overview
Problem
In image processing apparatuses, the timing restrictions for executing reset and power cutoff commands are severe, and volatile memory refresh operations interfere with the fetching of these commands, leading to potential data loss and malfunction.
Innovation Solution
A control apparatus that includes a processing unit, reset control unit, power control unit, memory, and memory control unit, where the processing unit fetches instructions from memory while restricting the memory control unit from performing refresh operations until the reset and power control instructions are fetched, thereby avoiding data loss and ensuring proper transition into a power-saving mode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory control unit performs refresh operations periodically to prevent data loss in volatile memory, then data reliability is improved, but the fetching of reset and power control instructions by the processing unit is interfered with, causing timing restrictions and potential malfunction
Solution Approach 1:
The memory control unit is configured to perform the refresh operation before the processing unit fetches the reset instruction and power control instruction from the memory. This preliminary action ensures that the memory data is refreshed and reliable before the critical instruction fetching occurs, eliminating the timing conflict and ensuring both data reliability and proper instruction execution timing
2Stability of the object's composition
If the CPU enters reset state immediately after reset control, then the initial state is achieved, but register access is blocked and power source cutoff control cannot be performed
Solution Approach 1:
The power source cutoff control is performed before the processing unit enters the reset state. The control apparatus executes the power source cutoff instruction while the CPU is still in operational state, allowing register access and control operations. Only after the power source cutoff is initiated does the CPU transition to reset state, ensuring that necessary control actions are completed before the CPU becomes inaccessible
Data Source
AI summary
A control apparatus for controlling a device having a power-saving mode includes a processing unit, a reset control unit configured to control reset of the processing unit, a power control unit configured to control supply of power to the processing unit, a memory configured to store reset instructions for causing the reset control unit to perform reset of the processing unit and power control instructions for causing the power control unit to cause to stop supply of power to the processing unit, and a memory control unit configured to perform a refresh operation of the memory, and the processing unit acquires the reset instructions and the power control instructions from the memory after performing processing to restrict the memory control unit from performing the refresh operation until the processing unit acquires the reset instructions and the power control instructions from the memory.