Nonvolatile Memory Refresh Mechanism for Resistance Drift
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Solution Overview
Problem
Resistive memory cells, such as phase change memory, suffer from resistance drift, where the resistance value stored by the memory cell changes over time, leading to narrowing or disappearance of resistance windows, causing data values to be misinterpreted due to inaccurate resistance drift models.
Innovation Solution
Implementing a refresh mechanism for nonvolatile memory cells and reference cells, where the refresh is triggered by specific conditions such as time passage, power off, or backup power supply, ensuring that the resistance values are updated to maintain accurate data representation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If numerous updates of thresholds are performed to address resistance drift, then the accuracy of resistance window boundaries is improved, but the device complexity and operational overhead increase
Solution Approach 1:
The patent applies preliminary action by performing a refresh operation immediately after programming the memory cell. This refresh operation proactively resets the resistance drift before it can cause data corruption, eliminating the need for continuous threshold updates. The refresh is triggered by the program operation itself, preparing the memory cell in advance to maintain data integrity throughout its retention period.
Solution Approach 2:
The patent extracts the threshold update mechanism from the system by replacing it with a refresh operation on the memory cell and reference cell. Instead of continuously adjusting thresholds to compensate for drift, the solution removes the drift effect entirely through periodic refresh, simplifying the overall system architecture and reducing operational overhead.
2Ease of operation
If resistance drift models are used to predict and compensate for drift, then the operational complexity is reduced, but the measurement precision deteriorates due to model divergence from actual drift
Solution Approach 1:
The patent applies self-service by having the memory system refresh its own data and reference values without relying on external drift models. The refresh operation is autonomously triggered by program operations or time-based conditions, and the memory cell self-corrects its resistance drift through the refresh process, eliminating the need for complex drift prediction algorithms.
Solution Approach 2:
The patent implements feedback by using the actual measured resistance values from memory cells to trigger refresh operations. The system monitors whether cells have been programmed or if a time threshold has been reached, and uses this feedback to determine when refresh is needed, ensuring accurate drift compensation based on actual cell state rather than predictive models.
3Reliability
If refresh operations are performed immediately after every program operation, then the data accuracy is maintained, but the productivity and write endurance are reduced
Solution Approach 1:
The patent applies periodic action by performing refresh operations based on time intervals or specific trigger conditions rather than continuously after every program operation. The refresh is triggered periodically by a time-based condition or by specific events such as power-off detection, reducing the frequency of refresh operations while still maintaining data accuracy throughout the retention period.
Solution Approach 2:
The patent applies partial action by refreshing only the specific memory cells that have been programmed or are at risk of drift, rather than refreshing the entire memory array. This selective approach maintains data accuracy for affected cells while minimizing the overall impact on productivity and write endurance.
4Measurement precision
If reference cells are refreshed frequently to maintain accurate reference thresholds, then the measurement precision is improved, but the loss of time and energy increase
Solution Approach 1:
The patent merges the refresh operation of memory cells with the refresh operation of reference cells. Both are refreshed together in a single operation triggered by the same conditions (program operation or time-based trigger), eliminating the need for separate refresh cycles and reducing the total time and energy required for maintaining accurate reference thresholds.
Solution Approach 2:
The patent applies periodic action to reference cell refresh by triggering it based on time intervals or specific events rather than continuously. The reference cells are refreshed periodically alongside memory cells, maintaining their accuracy while minimizing the time and energy spent on refresh operations.
Data Source
AI summary
Resistance drift can be addressed by refreshing the nonvolatile memory cells and reference cells. Different approaches include performing the refresh upon a program operation, and upon satisfaction of a condition after the program operation. Refreshes are performed on a reference resistance stored in a reference cell that can be compared by a sense amplifier to the resistance stored in a memory cell. In one approach, upon programming the first memory cell, a stored refresh status is updated to indicate that the first resistance of the first memory cell and the first reference resistance of the first reference cell are to be refreshed upon satisfaction of a condition. In another approach, upon programming the first memory cell, the first reference cell is programmed.


