Memory Sense Amplifier Offset Cancellation Under Refresh Noise
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Solution Overview
Problem
The performance difference between N-channel and P-channel transistors in sense amplifiers of semiconductor memory devices leads to offset voltage, reducing the sensing margin, and simultaneous power supply noise during offset cancellation operations further diminishes this margin during memory refresh operations.
Innovation Solution
A semiconductor memory device with a control section that performs offset cancellation operations on one page at a time, using a common power supply voltage, and controls the timing to avoid simultaneous operations on other pages, thereby reducing power supply noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the sequence of offset cancellation operations is performed on all pages simultaneously, then the offset voltage can be cancelled across all pages, but the power supply noise increases due to simultaneous current consumption from all sense amplifiers
Solution Approach 1:
The patent divides the offset cancellation operations into page-specific segments. Instead of performing operations on all pages simultaneously, the control section performs offset cancellation operations on sense amplifiers of one page at a time, sequentially moving to other pages. This segmentation prevents simultaneous current consumption across all pages, thereby reducing power supply noise while maintaining effective offset voltage cancellation.
Solution Approach 2:
The patent implements periodic offset cancellation operations where the control section cycles through different pages in a systematic manner. The operations are performed in periodic intervals on different page groups, allowing the system to maintain low power supply noise levels while progressively completing offset cancellation across all pages through repeated periodic cycles.
2Reliability
If the sequence of offset cancellation operations is performed during memory refresh, then offset voltage can be cancelled, but the sense margin of the sense amplifier may be reduced due to power supply noise
Solution Approach 1:
The patent segments the offset cancellation operations by page, performing them on one page at a time rather than simultaneously across all pages. This segmentation ensures that during refresh operations, only a subset of sense amplifiers are active at any given moment, reducing power supply noise and preserving the sense margin while still achieving effective offset voltage cancellation over time.
Solution Approach 2:
The patent performs offset cancellation operations as a preliminary action before or during memory refresh cycles. By initiating offset cancellation in advance and completing it systematically across pages, the system ensures that offset voltage is cancelled before critical read operations occur, maintaining sense margin integrity while achieving reliable offset compensation.
Data Source
AI summary
The present invention provides a semiconductor memory device and a control method thereof. The sensing margin of the sense amplifier can be improved even when a sequence of offset cancellation operations is being performed on the plurality of sense amplifiers of each of the plurality of pages. The semiconductor memory device includes a control section configured to perform at least one specific operation of a sequence of offset cancellation operations on the plurality of sense amplifiers of the each of the plurality of pages. The specific operation serves to provide a power supply voltage common to the each of the plurality of pages to the plurality of sense amplifiers. The control section controls a timing point of the sequence of offset cancellation operations of each of the plurality of pages while the sequence of offset cancellation operations is being performed on the each of the plurality of pages.