Non-Volatile Memory Background Refresh With SRAM Address Remapping
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Solution Overview
Problem
Non-volatile memory arrays face challenges in periodic refresh due to charge leakage at high temperatures, requiring determination of refresh timing and background refresh methods that avoid memory interruption and data loss during power outages.
Innovation Solution
A method and apparatus for automatically refreshing non-volatile memory arrays in the background using a temporary storage circuit to read, store, and reprogram data from segments without interrupting memory access, utilizing dead-time detection and address remapping to ensure continuous operation and data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-volatile memory is refreshed periodically to compensate for charge leakage at high temperatures, then data retention reliability is improved, but memory access interruption and system complexity increase
Solution Approach 1:
The memory array is divided into multiple segments, allowing selective refreshing of individual segments without interrupting access to other segments. This segmentation enables parallel operation where refresh operations on one segment do not block memory access to other segments, resolving the contradiction between maintaining data retention and ensuring continuous memory access.
Solution Approach 2:
A temporary storage circuit (SRAM) is introduced as an intermediary to hold data during background refresh operations. The temporary storage circuit acts as a buffer that allows the memory system to perform refresh operations without interrupting normal memory access, as data can be temporarily stored in the intermediary circuit while refresh occurs in the background.
2Ease of operation
If background refresh is performed without memory interruption, then memory access continuity is maintained, but additional temporary storage circuitry and control complexity are required
Solution Approach 1:
The refresh control circuit automatically detects dead time periods and initiates background refresh operations without requiring external intervention. The system monitors its own operation state, identifies appropriate refresh opportunities during dead time, and autonomously performs refresh operations, thereby reducing the burden on external control logic while maintaining memory access continuity.
Solution Approach 2:
Data is read from memory segments and stored in the temporary storage circuit during dead time before the actual refresh operation begins. This preliminary action prepares the system for background refresh by having data ready in temporary storage, allowing the refresh to proceed without interrupting memory access while minimizing the complexity of coordinated control operations.
3Productivity
If refresh operations are performed during dead time, then refresh efficiency is improved, but precise timing detection and control are required
Solution Approach 1:
The refresh control circuit continuously monitors memory access requests and uses feedback from the absence of requests (dead time detection) to trigger background refresh operations. This feedback mechanism allows the system to automatically identify and utilize dead time periods for refresh operations, improving refresh efficiency while the automated detection reduces the difficulty of timing control compared to manual or externally-controlled approaches.
Data Source
AI summary
A method for automatically refreshing a non-volatile memory array in the background without memory interruption includes selecting an unrefreshed segment of the memory, reading data from each row in the selected segment during memory dead time and storing the data read from each row in a local temporary storage memory until an entire segment is read out, remapping all memory addresses in the selected segment to the temporary storage memory, isolating column lines in the selected segment from global column lines, erasing the data in the selected segment without disturbing the column lines, rewriting memory data in each row of the selected segment, remapping all memory addresses in the selected segment to the memory, and repeating the process until all segments have been refreshed.