Semiconductor Memory Repair Circuit Anti-Fuse Programming
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Solution Overview
Problem
The existing semiconductor memory apparatuses face inefficiencies in programming repair addresses for memory block failures, as direct input of repair addresses from outside reduces the programming operation's efficiency.
Innovation Solution
A semiconductor memory apparatus with a repair circuit that includes a repair address detection circuit to determine memory block failures, a test data processing block to logically combine test data signals, and an anti-fuse circuit to electrically program the repair address, allowing for efficient storage and comparison with input addresses to replace defective memory blocks with redundancy blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If direct input of repair addresses from outside is used, then the repair address programming can be performed, but the programming operation efficiency is reduced
Solution Approach 1:
The repair address detection circuit automatically detects failed memory blocks and generates repair addresses without requiring external input. The circuit self-services by using its own test data processing capabilities to identify failures and produce the necessary repair address information, eliminating the inefficiency of external direct input methods
2Reliability
If comprehensive testing of all memory blocks is performed, then all failures can be detected, but the testing time and complexity increase
Solution Approach 1:
The test data processing block performs logical combination operations on test data signals to detect failures without requiring exhaustive testing of every single memory cell. By using logical combination of test results, the circuit achieves reliable failure detection with reduced testing overhead compared to comprehensive individual cell testing
Solution Approach 2:
Multiple test data signals from different memory blocks are logically combined in the test data processing block to identify failed blocks. This merging approach allows simultaneous evaluation of multiple memory blocks through combined logical operations, reducing overall testing time while maintaining detection accuracy
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient programming of repair addresses by identifying failed memory blocks through compressed testing and programming, improving the repair operation's efficiency and allowing for direct input of external addresses when needed.
Implementation Method 1
In a packaged state, an electrical method is used rather than a physical method that uses laser beams. Fuses programmable in a packaged state are generally referred to as electrical fuses, meaning that such fuses may be programmed by changing their electrical connection state through the application of electrical stress.
Data Source
AI summary
A repair circuit of a semiconductor memory apparatus includes a repair address detection circuit that determines the occurrence of a failure in a memory block based on a plurality of test data signals outputted from the memory block, and stores an address corresponding to the memory block determined to have failed as a repair address, and an anti-fuse circuit that receives the repair address from the repair address detection circuit and electrically programs the repair address to store a programmed address.